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71M6531F-MR/F/PE5

Description
Power Supply Management Circuit
CategoryPower/power management    The power supply circuit   
File Size2MB,121 Pages
ManufacturerMaxim
Websitehttps://www.maximintegrated.com/en.html
Download Datasheet Parametric View All

71M6531F-MR/F/PE5 Overview

Power Supply Management Circuit

71M6531F-MR/F/PE5 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMaxim
package instruction,
Reach Compliance Codeunknow
ECCN codeEAR99
Analog Integrated Circuits - Other TypesPOWER SUPPLY MANAGEMENT CIRCUIT
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Maximum time at peak reflow temperatureNOT SPECIFIED
71M6531D/F, 71M6532D/F
Energy Meter IC
Simplifying System Integration
TM
DATA SHEET
19-5374; Rev 1; 4/13
GENERAL DESCRIPTION
The 71M6531D/F and 71M6532D/F are highly
integrated SOCs with an MPU core, RTC, FLASH and LCD
driver. The patented Single Converter Technology® with a
22-bit delta-sigma ADC, four analog inputs, digital tempera-
ture compensation, precision voltage reference, battery voltage
monitor and 32-bit computation engine (CE) supports a wide
range of residential metering applications with very few low-
cost external components.
A 32-kHz crystal time base for the entire system and internal
battery backup support for RAM and RTC further reduce system
cost. The IC supports 2-wire, and 3-wire single-phase and
dual-phase residential metering along with tamper-detection
mechanisms. The 71M6531D/F offers single-ended inputs for
two current channels and two single-ended voltage inputs.
The 71M6532D/F has two differential current inputs and three
single-ended voltage inputs.
Maximum design flexibility is provided by multiple UARTs, I C,
μWire, up to 21 DIO pins and in-system programmable FLASH
memory, which can be updated with data or application code
in operation.
A complete array of ICE and development tools, programming
libraries and reference designs enable rapid development and
certification of TOU, AMR and Prepay meters that comply with
worldwide electricity metering standards.
2
FEATURES
Wh accuracy < 0.1% over 2000:1 current
range
Exceeds IEC62053/ANSI C12.20 standards
Four sensor inputs
Low-jitter Wh and VARh plus two additional
pulse test outputs (4 total, 10 kHz maximum)
with pulse count
Four-quadrant metering
Tamper detection (Neutral current with CT,
Rogowski or shunt, magnetic tamper input)
Line frequency count for RTC
Digital temperature compensation
Sag detection for phase A and B
Independent 32-bit compute engine
46-64 Hz line frequency range with same
calibration. Phase compensation (± 7°)
Three battery modes with wake-up on timer
or push-button:
BROWNOUT Mode (52 µA typ.)
LCD Mode (21 µA typ., DAC active)
SLEEP Mode (0.7 µA typ.)
Energy display during mains power failure
39 mW typical consumption @ 3.3 V, MPU
clock frequency 614 kHz
22-bit delta-sigma ADC with 3360 Hz or
2520 Hz sample rate
8-bit MPU (80515),1 clock cycle per instruction,
10 MHz maximum, with integrated ICE for
debug
RTC for TOU functions with clock-rate adjust
register
Hardware watchdog timer, power fail monitor
LCD driver with 4 common segment drivers:
Up to 156 (71M6531D/F) or 268 pixels
(71M6532D/F)
Up to 22 (71M6531D/F) or 43 (71M6532D/F)
general-purpose I/O pins. Digital I/O pins
compatible with 5 V inputs
32 kHz time base
High-speed slave SPI interface to data RAM
Two UARTs for IR and AMR, IR driver with
modulation
FLASH memory with security and in-system
program update:
128 KB (71M6531D/32D)
256 KB (71M6531F/32F)
4 KB MPU XRAM
Industrial temperature range
68-pin QFN package for 71M6531D/F pin-
compatible with 71M6521, 100-pin LQFP
package for 71M6532D/F, lead free
1
A
CT/SHUNT
LOAD
NEUTRAL
CT
LOAD
POWER SUPPLY
B
ADC
IAP*
IAN*
VA
IBP*
IBN*
VB
V3.3A
V3.3
SYS
GNDA GNDD
PWR MODE
CONTROL
71M6531
71M6532
TEMP
SENSOR
WAKE-UP
REGULATOR
VBAT
V2.5
BATTERY
VOLTAGE REF
VREF
VBIAS
SERIAL PORTS
LCD & DIO
COM0..3
RAM
FLASH
MEMORY
COMPUTE
ENGINE
LCD SEG
SEG/DIO
88.88.8888
I2C or µWire
EEPROM
TEST PULSES
AMR
TX
RX
RX/DIO1
IR
POWER
FAULT
32 kHz
TX/DIO2
SENSE
DRIVE/MOD
COMPARATOR
V1
OSC/PLL
XIN
XOUT
*
MPU
TIMERS
RTC
ICE I/F
ICE_E
02/18/2009
SPI
SPI HOST
V3P3D
GNDD
Differential pins only on 6532D/F
Rev 2
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