Features
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Single Power Supply
Read and Write Voltage, 5V
±
5%
High Performance
200 ns Maximum Access Time
6 ms Typical Sector Write
CMOS Low Power Consumption
20 mA Typical Active Current (Byte Mode)
400
µA
Typical Standby Current
Fully MS-DOS Compatible Flash Driver and Formatter
Virtual-Disk Flash Driver with 256 Bytes/Sector
Random Read/Write to any Sector
No Erase Operation Required Prior to any Write
Zero Data Retention Power
Batteries not Required for Data Storage
PCMCIA/JEIDA 68-Pin Standard
Selectable Byte- or Word-Wide Configuration
High Re-programmable Endurance
Built-in Redundancy for Sector Replacement
Minimum 100,000 Write Cycles
Five Levels of Write Protection
Prevent Accidental Data Loss
256K byte
Flash Memory
PCMCIA Card
AT5FC256
Block Diagram
Pin Configuration
Pin Name
A0-A17
D0-D15
CE1, CE2,
WE, OE, REG
CD, WP
BVD1, BVD2
Function
Addresses
Data
Control Signals
Card Status
Description
Atmel’s Flash Memory Card provides the highest system
level performance for data and file storage solutions to the
portable PC market segment. Data files and applications
programs can be stored on the AT5FC256. This allows
OEM manufacturers of portable system to eliminate the
weight, power consumption and reliability issues associ-
ated with electro-mechanical disk-based systems. The
AT5FC256 requires a single voltage power supply for total
system operation. No batteries are needed for data reten-
tion due to its Flash-based technology. Since no high volt-
age (12-volt) is required to perform any write operation,
the AT5FC256 is suitable for the emerging "mobile" per-
sonal systems.
The AT5FC256 is compatible with the 68-pin
PCMCIA/JEIDA international standard. Atmel’s Flash
Memory Cards can be read in either a byte-wide or word-
wide mode which allows for flexible integration into various
system platforms. It can be read like any typical PCMCIA
SRAM or ROM card.
The Card Information Structure (CIS) can be written by the
OEM or by Atmel at the attribute memory address space
using a format utility. The CIS appears at the beginning of
the card’s attribute memory space and defines the low-
level organization of data on the PC card. The AT5FC256
contains a separate 2K byte EEPROM memory for the
card’s attribute memory space.
The third party software solutions such as AWARD Soft-
ware’s CardWare system and the SCM’s Flash File Sys-
tem (FFS), enables Atmel’s Flash Memory Card to emu-
late the function of essentially all the major brand personal
computers that are DOS/Windows compatible.
For some unique portable computers, such as the
HP200/100/95LX series, the software Driver and Format-
ter are also available. The Atmel Driver and Formatter util-
izes a self-contained spare sector replacement algorithm,
enabled by Atmel’s small 256-byte sectors, to achieve
long term card reliability and endurance.
Block Diagram
2
AT5FC256
AT5FC256
Absolute Maximum Ratings*
Storage Temperature........................ -30°C to +70°C
Ambient Temperature with
Power Applied................................... -10°C to +70°C
Voltage with
Respect to Ground, All pins
(1)
........... -2.0V to +7.0V
V
CC (1)
................................................ -2.0V to +7.0V
Output Short Circuit Current
(2)
.................... -200 mA
*NOTICE: Stresses beyond those listed under "Absolute Maxi-
mum Ratings" may cause permanent damage to the card.
This is a stress rating only and functional operation of the
card at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied.Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Notes:
1. Minimum DC voltage on input or I/O pins is -0.5V. During
voltage transients, inputs may overshoot V
SS
to -2.0V for
periods of up to 20 ns. Maximum DC voltage on output and
I/O pins is V
CC
+ 0.5V. During voltage transitions, outputs
may overshoot to V
CC
+ 2.0V for periods up to 20 ns.
2. No more than one output shorted at a time. Duration of the
short circuit should not be greater than one second. Condi-
tions equal V
OUT
= 0.5V or 5.0V, V
CC
= Max.
DC and AC Operating Range
AT5FC256-20
Operating Temperature (Case)
V
CC
Power Supply
Com.
0
o
C - 70
o
C
5V
±
5%
Pin Capacitance
(f = 1 MHz, T = 25°C)
(1)
Symbol
C
IN1
C
OUT
C
IN2
C
I/O
Note:
Parameter
Address Capacitance
Output Capacitance
Control Capacitance
I/O Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
V
I/O
= 0V
Typ
Max
20
20
45
20
Units
pF
pF
pF
pF
1. This parameter is characterized and is not 100% tested.
3
PC Card Pin Assignments
I = Input, O = Output, I/O = Bi-directional, NC = No Connect
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal
GND
D3
D4
D5
D6
D7
CE
1
A10
OE
A11
A9
A8
A13
A14
WE
NC
V
CC
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
WP
GND
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I/O
Function
Ground
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
Card Enable 1
(1)
Address Bit 10
Output Enable
Address Bit 11
Address Bit 9
Address Bit 8
Address Bit 13
Address Bit 14
Write Enable
No Connect
Power Supply
No Connect
Address Bit 16
Address Bit 15
Address Bit 12
Address Bit 7
Address Bit 6
Address Bit 5
Address Bit 4
Address Bit 3
Address Bit 2
Address Bit 1
Address Bit 0
Data Bit 0
Data Bit 1
Data Bit 2
Write Protect
(1)
Ground
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal
GND
CD
1
D11
D12
D13
D14
D15
CE
2
NC
RFU
RFU
A17
NC
NC
NC
NC
V
CC
NC
NC
NC
NC
NC
NC
NC
NC
NC
REG
BVD
2
BVD
1
D8
D9
D10
CD
2
GND
I
O
O
I/O
I/O
I/O
O
I
O
I/O
I/O
I/O
I/O
I/O
I
I/O
Function
Ground
Card Detect 1
(1)
Data Bit 11
Data Bit 12
Data Bit 13
Data Bit 14
Data Bit 15
Card Enable 2
(1)
No Connect
Reserved
Reserved
Address Bit 17
No Connect
No Connect
No Connect
No Connect
Power Supply
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
Register Select
Battery Voltage Detect 2
(2)
Battery Voltage Detect 1
(2)
Data Bit 8
Data Bit 9
Data Bit 10
Card Detect 2
(1)
Ground
Notes: 1. Signal must not be connected between cards.
2. BVD = Internally pulled up.
4
AT5FC256
AT5FC256
Pin Description
Symbol
A0-A17
Name
Address Inputs
Type
Input
Input/Output
Function
Address Inputs are internally latched during write cycles.
Data Input/Outputs are internally latched on write cycles.
Data outputs are latched during read cycles. Data pins
are active high. When the memory card is de-selected or
the outputs are disabled the outputs float to tri-state.
Card Enable is active low. The memory card is
de-selected and power consumption is reduced to
standby levels when CE is high. CE activates the internal
memory card circuitry that controls the high and low byte
control logic of the card, input buffers, segment decoders,
and associated memory devices.
Output Enable is active low and enables the data buffers
through the card outputs during read cycles.
Write Enable is active low and controls the write function
to the memory array. The target address is latched on the
falling edge of the WE pulse and the appropriate data is
latched on the rising edge of the pulse.
PC Card Power Supply for device operation
(5.0V
±
5%)
Ground
Output
Output
When Card Detect 1 and 2 = Ground the system detects
the card.
Write Protect is active high and indicates that all card
write operations are disabled by the write protect switch.
Corresponding pin is not connected internally.
Output
Input
Internally pulled up. (There is no battery in the card.)
Provide access to Card Information Structure in the
Attribute Memory Device
D0-D15
Data Input/Output
CE
1
, CE
2
Card Enable
Input
OE
Output Enable
Input
WE
Write Enable
Input
V
CC
GND
CD
1
, CD
2
WP
NC
BVD
1
, BVD
2
REG
PC Card Power
Supply
Ground
Card Detect
Write Protect
No Connect
Battery Voltage Detect
Register Select
Memory Card Operations
The AT5FC256 Flash Memory Card is organized as an
array of 2 individual AT29C010A devices. They are logi-
cally defined as contiguous sectors of 256 bytes. Each
sector can be read and written randomly as designated by
the host. There is NO need to
erase
any sector prior to any
write
operation. Also, there is NO high voltage (12V) re-
quired to perform any write operations.
The common memory space data contents are altered in
a similar manner as writing to individual Flash memory de-
vices. On-card address and data buffers activate the ap-
propriate Flash device in the memory array. Each device
internally latches address and data during write cycles.
Refer to the
Common Memory Operations
table.
Byte-Wide Operations
The AT5FC256 provides the flexibility to operate on data
in byte-wide or word-wide operations. Byte-wide data is
available on D0-D7 for read and write operations (CE
1
=
low, CE
2
= high). Even and odd bytes are stored in a pair
of memory chip segments (i.e., S0 and S1) and are ac-
cessed when A0 is low and high respectively.
Word-Wide Operations
The 16 bit words are accessed when both CE
1
and CE
2
are forced low, A0 = don’t care. D0-D15 are used for word-
wide operations.
(continued)
5
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