Features
•
Low-Voltage and Standard-Voltage Operation
– 5.0 (V
CC
= 4.5V to 5.5V)
– 2.7 (V
CC
= 2.7V to 5.5V)
– 2.5 (V
CC
= 2.5V to 5.5V)
3-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
2 MHz Clock Rate (5V) Compatibility
Self-Timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: > 4000V
Automotive Grade and Extended Temperature Devices Available
8-Pin PDIP and JEDEC SOIC Packages
•
•
•
•
•
•
•
3-Wire
Serial EEPROM
1K (64 x 16)
Description
The AT93C46C provides 1024 bits of serial electrically-erasable programmable read
only memory (EEPROM) organized as 64 words of 16 bits each. The device is opti-
mized for use in many industrial and commercial applications where low-power and
low-voltage operation are essential. The AT93C46C is available in space saving 8-pin
PDIP and 8-pin JEDEC packages.
The AT93C46C is enabled through the Chip Select pin (CS), and accessed via a 3-
wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock
(SK). Upon receiving a READ instruction at DI, the address is decoded and the data is
clocked out serially on the data output pin DO. The WRITE cycle is completely self-
timed and no separate ERASE cycle is required before WRITE. The WRITE cycle is
only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is
brought “high” following the initiation of a WRITE cycle, the DO pin outputs the
READY/BUSY status of the part.
The AT93C46C is available in 4.5V to 5.5V, 2.7V to 5.5V, and 2.5V to 5.5V versions.
AT93C46C
Pin Configurations
Pin Name
CS
SK
DI
DO
GND
VCC
NC
DC
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
No Connect
Don’t Connect
CS
SK
DI
DO
1
2
3
4
CS
SK
DI
DO
8-Pin PDIP
1
2
3
4
8
7
6
5
VCC
DC
NC
GND
3-Wire, 1K
Serial E
2
PROM
8-Pin SOIC
8
7
6
5
VCC
DC
NC
GND
Rev. 1122A–07/98
1
Absolute Maximum Ratings*
Operating Temperature .................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Block Diagram
Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25°C, f = 1.0 MHz, V
CC
= +5.0V (unless otherwise noted).
Test Conditions
C
OUT
C
IN
Note:
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
1. This parameter is characterized and is not 100% tested.
Max
5
5
Units
pF
pF
Conditions
V
OUT
= 0V
V
IN
= 0V
2
AT93C46C
AC Characteristics (Continued)
Applicable over recommended operating range from T
A
= -40°C to + 85°C, V
CC
= +2.5V to + 5.5V,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
t
DIS
Parameter
DI Setup Time
Test Condition
Relative to SK
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V
0.1
4.5V
≤
V
CC
≤
5.5V
Endurance
(1)
Note:
5.0V, 25°C, Page Mode
1M
1. This parameter is characterized and is not 100% tested.
1
Min
100
100
200
0
100
100
200
250
250
500
250
250
500
250
250
500
100
100
200
10
Typ
Max
Units
ns
t
CSH
t
DIH
CS Hold Time
DI Hold Time
Relative to SK
Relative to SK
ns
ns
t
PD1
Output Delay to ‘1’
AC Test
ns
t
PD0
Output Delay to ‘0’
AC Test
ns
t
SV
CS to Status Valid
AC Test
ns
t
DF
CS to DO in High Impedance
AC Test
CS = V
IL
ns
t
WP
Write Cycle Time
ms
ms
Write Cycle
Instruction Set for the AT93C46C
Address
Instruction
READ
EWEN
ERASE
WRITE
ERAL
WRAL
EWDS
SB
1
1
1
1
1
1
1
Op Code
10
00
11
01
00
00
00
x 16
A
5
- A
0
11XXXX
A
5
- A
0
A
5
- A
0
10XXXX
01XXXX
00XXXX
Comments
Reads data stored in memory, at specified address.
Write enable must precede all programming modes.
Erase memory location A
n
- A
0
.
Writes memory location A
n
- A
0
.
Erases all memory locations. Valid only at V
CC
= 4.5V to 5.5V.
Writes all memory locations. Valid only at V
CC
= 4.5V to 5.5V.
Disables all programming instructions.
4
AT93C46C
AT93C46C
Functional Description
The AT93C46C is accessed via a simple and versatile
three-wire serial communication interface. Device opera-
tion is controlled by seven instructions issued by the host
processor.
A valid instruction starts with a rising edge
of CS
and consists of a Start Bit (logic ‘1’) followed by the
appropriate Op Code and the desired memory Address
location.
READ (READ):
The Read (READ) instruction contains
the Address code for the memory location to be read. After
the instruction and address are decoded, data from the
selected memory location is available at the serial output
pin DO. Output data changes are synchronized with the ris-
ing edges of serial clock SK. It should be noted that a
dummy bit (logic ‘0’) precedes the 16-bit data output string.
ERASE/WRITE (EWEN):
To assure data integrity, the
part automatically goes into the Erase/Write Disable
(EWDS) state when power is first applied. An Erase/Write
Enable (EWEN) instruction must be executed first before
any programming instructions can be carried out. Please
note that once in the Erase/Write Enable state, program-
ming remains enabled until an Erase/Write Disable
(EWDS) instruction is executed or V
CC
power is removed
from the part.
ERASE (ERASE):
The Erase (ERASE) instruction pro-
grams all bits in the specified memory location to the logical
‘1’ state. The self-timed erase cycle starts once the ERASE
instruction and address are decoded. The DO pin outputs
the READY/BUSY status of the part if CS is brought high
after being kept low for a minimum of 250 ns (t
CS
). A logic
‘1’ at pin DO indicates that the selected memory location
has been erased, and the part is ready for another instruc-
tion.
WRITE (WRITE):
The Write (WRITE) instruction contains
the 16 bits of data to be written into the specified memory
location. The self-timed programming cycle t
WP
starts after
the last bit of data is received at serial data input pin DI.
The DO pin outputs the READY/BUSY status of the part if
CS is brought high after being kept low for a minimum of
250 ns (t
CS
). A logic ‘0’ at DO indicates that programming is
still in progress. A logic ‘1’ indicates that the memory loca-
tion at the specified address has been written with the data
pattern contained in the instruction and the part is ready for
further instructions.
A Ready/Busy Status cannot be
obtained if the CS is brought high after the end of the
self-timed programming cycle, t
WP
.
ERASE ALL (ERAL):
The Erase All (ERAL) instruction
programs every bit in the memory array to the logic ‘1’ state
and is primarily used for testing purposes. The DO pin out-
puts the READY/BUSY status of the part if CS is brought
high after being kept low for a minimum of 250 ns (t
CS
). The
ERAL instruction is valid only at V
CC
= 5.0V
±
10%.
WRITE ALL (WRAL):
The Write All (WRAL) instruction
programs all memory locations with the data patterns spec-
ified in the instruction. The DO pin outputs the
READY/BUSY status of the part if CS is brought high after
being kept low for a minimum of 250 ns (t
CS
). The WRAL
instruction is valid only at V
CC
= 5.0V
±
10%.
ERASE/WRITE DISABLE (EWDS):
To protect against
accidental data disturb, the Erase/Write Disable (EWDS)
instruction disables all programming modes and should be
executed after all programming operations. The operation
of the READ instruction is independent of both the EWEN
and EWDS instructions and can be executed at any time.
5
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