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WS512K32NV-100HM

Description
SRAM Module, 512KX32, 100ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66
Categorystorage    storage   
File Size379KB,8 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

WS512K32NV-100HM Overview

SRAM Module, 512KX32, 100ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66

WS512K32NV-100HM Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerMicrosemi
Parts packaging codePGA
package instructionPGA,
Contacts66
Reach Compliance Codecompli
ECCN code3A001.A.2.C
Maximum access time100 ns
JESD-30 codeS-CPGA-P66
JESD-609 codee4
length30.1 mm
memory density16777216 bi
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of terminals66
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize512KX32
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codePGA
Package shapeSQUARE
Package formGRID ARRAY
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height6.22 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
Maximum time at peak reflow temperatureNOT SPECIFIED
width30.1 mm
White Electronic Designs
512Kx32 SRAM 3.3V MODULE
FEATURES
Access Times of 70, 85, 100, 120ns
Packaging
• 66-pin, PGA Type, 1.185 inch square, Hermetic
Ceramic HIP (Package 401)
• 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880
inch), 4.57mm (0.180") high (Package 510).
Designed to
t JEDEC 68 lead 0.990" CQFJ
footprint
Organized as 512Kx32; User Configurable as
1024Kx16 or 2Mx8
Commercial, Industrial and Military Temperature
Ranges
WS512K32V-XXX
ADVANCED*
TTL Compatible Inputs and Outputs
Low Voltage Operation:
• 3.3V ± 10% Power Supply
Low Power CMOS
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight
WS512K32V-XG2TX - 8 grams typical
WS512K32V-XHX - 13 grams typical
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
PIN CONFIGURATION FOR WS512K32NV-XHX
Top View
1
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
A
17
I/O
0
I/O
1
I/O
2
11
22
12
WE
2
#
CS
2
#
GND
I/O
11
A
10
A
11
A
12
V
CC
CS
1
#
NC
I/O
3
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
18
WE
1
#
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
44
34
V
CC
CS
4
#
WE
4
#
I/O
27
A
3
A
4
A
5
WE
3
#
CS
3
#
GND
I/O
19
55
45
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
8
8
8
8
OE#
A
0-18
512K x 8
512K x 8
512K x 8
512K x 8
WE
1
# CS
1
#
Pin Description
56
I/O
0-31
A
0-18
WE
1-4
#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
Block Diagram
WE
2
# CS
2
#
WE
3
# CS
3
#
WE
4
# CS
4
#
I/O
20
66
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
February 2000
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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