OKI Semiconductor
ML5401MD
Dual Channel Flexible 750mA Linear Regulator with UVLO
PEDLXXXXXXXXXXXX-04
Issue Date: Ju½½. 18, 2005
Preliminary
General Description
The ML5401 is a voltage regulator IC consisting of two voltage regulators, both of which have their
own output voltage identifier pins. The minimum output capacitance requirement is 33uF.
Reference voltage is a trimmed band gap within 1% accuracy.
Under voltage lockout circuitry protects against unregulated output voltages when the input voltage
is below specification.
Current limit protects against short circuit current, and on chip over temperature circuitry limits the
maximum die temperature.
The current delivery capability of this device is directly dependent on the thermal management
implementation by the board designer and the package selection. High power packages may have
a significant impact on the average unit price of this product.
Features
• Two independent outputs
• Line regulation: 0.5% Maximum
• Load regulation: 0.8% Maximum
• Under-voltage lockout
• Over Temperature protection
• Selectable output voltages individually
• Current limit protection
• 8-pin WSON Package(P-WSON8-0605-1.27-M)
Applications
• Hard Disk Drives, CD-ROMs
• Set-top Boxes
• Motherboards with multiple supplies
• Printers
• Cellular phones
• Cordless phones
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PEDRXXXXXXXXXXXXX-04
OKI Semiconductor
ML5401
Block Diagram
Figure 1: Block diagram of ML5401
Rev 0.2
2
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PEDRXXXXXXXXXXXXX-04
OKI Semiconductor
ML5401
PIN DESCRIPTION
Pin Name
Vid0a
Vid1a
Vid0b
Vid1b
Vdd
Outb
Vin
Outa
Gnd
Pin Number
1
2
3
4
5
6
7
8
9
Pin Function
Output voltage identifier, see Table 1
Output voltage identifier, see Table 1
Output voltage identifier, see Table 1
Output voltage identifier, see Table 1
Power supply
Channel B output
Input voltage
Channel A output
Ground (Exposed Pad)
Vid1
1
1
1
F
Vid0
0
1
F
F
Output Voltage
1.2V
1.5V
1.8V
2.5V
Float is open condition.
Table 1: Output Voltage Selection Codes (F = Floating condition, 1 = Vdd, and 0 = Gnd)
Rev 0.2
3
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PEDRXXXXXXXXXXXXX-04
OKI Semiconductor
ML5401
Absolute maximum rating
Parameter
Power Supply
Input Voltage
Output Voltage
Junction Temperature
Storage Temperature
Symbol
VIN, VDD
Vid
Vout
Tj
TSTG
Conditions
Ta=25℃,
GND=0V
-
-
Range
-0.3 to 6.5
-0.3 to VDD + 0.3
-0.3 to VIN + 0.3 < VDD +0.3V
150
-65 to 150
Units
V
V
V
℃
℃
Recommended Operating Conditions
GND=0.0V
Parameter
Conditions
Min
Typ.
Max
Units
V
V
½A
ºC
Power Supply (VIN)
3.0
3.3
3.6
Power Supply (VDD)
4.5
5.0
5.5
Output Current *
750
Operating Junction
0
125
Temperature
*: The total Current of Outa pin and Outb pin must be less than 750mA.
Electrical Specifications
Parameter
Vid Pins interface *
H level Input Voltage
L level Input Voltage
H level Leak Current
L level Leak Current
Typicals and limits appearing in normal type apply for TJ = 25°C. Limits appearing in
Boldface
type apply over the entire junction
temperature range of operation, 0°C to 125°C.
Symbol
VIH
VIL
IIH
IIL
Conditions
Min.
0.8*VDD
Typ.
Max.
0.2*VDD
50
Units
V
V
uA
uA
mA
Vi=VDD
Vi=GND
Vid1A=Vid0A=Vid1B=Vid0
IDDS
=GND,
Quiescent current
OUTA=OUTB=open
*: Vid pins are vid1a,vid0a,vid1b and vid0b .
‐
50
6.0
Rev 0.2
4
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PEDRXXXXXXXXXXXXX-04
OKI Semiconductor
ML5401
Electrical Specifications
Parameter
Reference voltage
Output Voltage (note 2)
Vout 1.2V
Vout 1.5V
Vout 1.8V
Vout 2.5V
Line Regulation
Typicals and limits appearing in normal type apply for TJ = 25°C. Limits appearing in
Boldface
type apply over the entire junction
temperature range of operation, 0°C to 125°C.
Conditions
Min.
0.891
Typ.
0.9
1.2
1.5
1.8
2.5
Max.
0.909
1.224
1.530
1.836
2.550
0.5
6.0
7.5
9.0
12.5
0.8
Units
V
V
V
V
V
%
mV
mV
mV
mV
%
mV
mV
mV
mV
A
ºC/W
ºC/W
0<Iout<750mA, 3<vin<3.6
0<Iout<750mA, 3<vin<3.6
0<Iout<750mA, 3<vin<3.6
0<Iout<750mA, 3<vin<3.6
Iout=1mA
Vout=1.2V, Iout=1mA, 3<Vin<3.6
Vout=1.5V, Iout=1mA, 3<Vin<3.6
Vout=1.8V, Iout=1mA, 3<Vin<3.6
Vout=2.5V, Iout=1mA, 3<Vin<3.6
1.176
1.470
1.764
2.450
∆
Vout
∆
Vout
∆
Vout
∆
Vout
Load Regulation
∆
Vout
∆
Vout
∆
Vout
∆
Vout
Current Limit
Thermal resistance
Junction-to-Ambient
Thermal resistance
Junction-to-case
UVLO Levels
Vdd Rising threshold
Vdd falling threshold
Thermal Shutdown
Shutdown temperature
Thermal hysteresis
Vout=1.2V, 0<Iout<750mA, Vin=3.3
Vout=1.5V, 0<Iout<750mA, Vin=3.3
Vout=1.8V, 0<Iout<750mA, Vin=3.3
Vout=2.5V, 0<Iout<750mA, Vin=3.3
Short circuit
(No air flow)
0.8
1
32
1.8
9.6
12.0
14.4
20.0
1.3
3.9
3.8
4.35
4.15
4.5
4.40
V
V
160
20
ºC
ºC
Note 1:
The Iout range of 750mA across the four output voltages is dependent upon thermal management of the device, which includes
but not limited to proper mounting of the back side of the package to the ground plane of a minimum of 4LM board, and no less than five
vias under the device and a package with adequate PD capabilities.
Note 2:
The chip has two outputs that use the same band gap reference. The band gap can be trimmed within 1%, but the offset of only
one channel cancels out during trimming procedure at one output voltage. Therefore another 0.9% initial voltage error may occur between
the two channels at different outputs.
Rev 0.2
5
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