Real-Time Clock with Battery
Backed Non-Volatile RAM
1338
Datasheet
Description
The 1338 is a serial real-time clock (RTC) device that
consumes ultra-low power and provides a full binary-coded
decimal (BCD) clock/calendar with 56 bytes of battery
backed Non-Volatile Static RAM. The clock/calendar
provides seconds, minutes, hours, day, date, month, and
year information. The clock operates in either the 24-hour
or 12-hour format with AM/PM indicator. The end of the
month date is automatically adjusted for months with fewer
than 31 days, including corrections for leap year. Access to
the clock/calendar registers is provided by an I
2
C interface
capable of operating in fast I
2
C mode. Built-in Power-sense
circuitry detects power failures and automatically switches
to the backup supply, maintaining time and date operation.
Features
•
Real-Time Clock (RTC) counts seconds, minutes, hours,
day, date, month, and year with leap-year compensation
valid up to 2100
storage
•
56-byte battery-backed Non-Volatile RAM for data
•
•
•
•
Fast mode I
2
C serial interface
Automatic power-fail detect and switch circuitry
Programmable square-wave output
Packaged in 8-pin MSOP, 8-pin SOIC, or 16-pin SOIC
(surface-mount package with an integrated crystal)
•
Industrial temperature range (-40°C to +85°C)
Typical Applications
•
Telecom (Routers, Switches, Servers)
•
Handheld (GPS, Point of Sale POS Terminals)
•
Consumer Electronics (Set-Top Box, Digital Recording,
Network Applications, Digital Photo Frames)
•
Office (Fax/Printers, Copiers)
•
Medical (Glucometer, Medicine Dispensers)
•
Other (Thermostats, Vending Machines, Modems, Utility
Meters)
Block Diagram
Crystal inside package
for 16-pin SOIC ONLY
1Hz / 4.096kHz /
8.192kHz / 32.768kHz
X1
32.768kHz
Oscillator and
Divider
MUX/
Buffer
SQW/OUT
X2
VCC
GND
V
BAT
SCL
SDA
IC
Interface
2
Power
Control
Control
Logic
Clock, Calendar
Counter
56 Byte
RAM
1 Byte
Control
7 Bytes
Buffer
©2020 Renesas Electronics Corporation
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September 30, 2020
1338 Datasheet
Pin Assignment
(8-pin MSOP/8-pin SOIC)
X1
X2
V
BAT
GND
1
2
3
4
8
VCC
SQW/OUT
SCL
SDA
Pin Assignment
(16-pin SOIC)
SCL
SQW/OUT
VCC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
16
15
14
SDA
GND
V
BAT
NC
NC
NC
NC
NC
IDT
1338
7
6
5
IDT
1338C
13
12
11
10
9
Pin Descriptions
Pin
Number
8MSOP,
8SOIC
1
2
3
16SOIC
—
—
14
Pin
Name
X1
X2
V
BAT
Pin Description/Function
Connections for standard 32.768kHz quartz crystal. The internal oscillator circuitry is designed
for operation with a crystal having a specified load capacitance (CL) of 12.5pF. An external
32.768kHz oscillator can also drive the IDT1338. In this configuration, the X1 pin is connected to
the external oscillator signal and the X2 pin is left floating.
Backup Supply Input for Lithium Coin Cell or Other Energy Source. Battery voltage must be held
between the minimum and maximum limits for proper operation. Diodes placed in series
between the backup source and the V
BAT
pin may prevent proper operation. If a backup supply
is not required, V
BAT
must be connected to ground.
Connect to ground.
Serial data input/output. SDA is the input/output pin for the I
2
C serial interface. It is an open-drain
output and requires an external pull-up resistor (2kOhm typical).
Serial clock input. SCL is used to synchronize data movement on the serial interface. It is an
open-drain output and requires an external pull-up resistor (2kOhm typical)
4
5
6
7
15
16
1
2
GND
SDA
SCL
SQW/OUT Square-Wave/Output driver. When enabled and the SQWE bit set to 1, the SQW/OUT pin
outputs one of four square-wave frequencies (1Hz, 4kHz, 8kHz, 32kHz). It is an open drain
output and requires an external pull-up resistor (10K ohm typical). Operates when the device is
powered with VCC or V
BAT
.
V
CC
NC
Device power supply. When voltage is applied within specified limits, the device is fully
accessible by I
2
C and data can be written and read.
No connect. These pins are unused and must be connected to ground for proper operation.
8
—
3
4 – 13
©2020 Renesas Electronics Corporation
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September 30, 2020
1338 Datasheet
Typical Operating Circuit
V
CC
V
CC
CRYSTAL
V
CC
2k
CPU
2k
X1
SCL
SDA
X2
V
CC
SQW/OUT
10k
IDT1338
GND
V
BAT
+
-
Detailed Description
The following sections discuss in detail the Oscillator
block, Power Control block, Clock/Calendar Register
Block and Serial I
2
C block.
Oscillator Block
Selection of the right crystal, correct load capacitance
and careful PCB layout are important for a stable crystal
oscillator. Due to the optimization for the lowest possible
current in the design for these oscillators, losses caused
by parasitic currents can have a significant impact on the
overall oscillator performance. Extra care needs to be
taken to maintain a certain quality and cleanliness of the
PCB.
Crystal Selection
The key parameters when selecting a 32 kHz crystal to
work with 1338 RTC are:
•
Recommended Load Capacitance
•
Crystal Effective Series Resistance (ESR)
•
Frequency Tolerance
In the above figure, X1 and X2 are the crystal pins of our
device. Cin1 and Cin2 are the internal capacitors which
include the X1 and X2 pin capacitance. Cex1 and Cex2
are the external capacitors that are needed to tune the
crystal frequency. Ct1 and Ct2 are the PCB trace
capacitances between the crystal and the device pins.
CS is the shunt capacitance of the crystal (as specified in
the crystal manufacturer's datasheet or measured using a
network analyzer). Cex1 and Cex2 are not needed if the
crystal circuit uses the recommended crystal with
specified load capacitance (CL) of 12.5pF.
Note:
1338CSRI integrates a standard 32.768 kHz
crystal in the package and contributes an additional
frequency error of 10ppm at nominal
V
CC
(+3.3 V) and
T
A
=
+25°C.
Effective Load Capacitance
Please see diagram below for effective load capacitance
calculation. The effective load capacitance (CL) should
match the recommended load capacitance of the crystal
in order for the crystal to oscillate at its specified parallel
resonant frequency with 0ppm frequency error.
©2020 Renesas Electronics Corporation
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September 30, 2020
1338 Datasheet
ESR (Effective Series Resistance)
Choose the crystal with lower ESR. A low ESR helps the
crystal to start up and stabilize to the correct output
frequency faster compared to high ESR crystals.
PCB Layout
Frequency Tolerance
The frequency tolerance for 32kHz crystals should be
specified at nominal temperature (+25°C) on the crystal
manufacturer datasheet. The crystals used with 1338
typically have a frequency tolerance of ±20ppm at +25°C.
Specifications for a typical 32kHz crystal used with our
device are shown in the table below.
Parameter
Nominal Freq.
Series Resistance
Load Capacitance
Symbol
f
O
ESR
C
L
Min
Typ
32.768
Max Units
kHz
110
k
pF
PCB Assembly, Soldering and Cleaning
Board-assembly production process and assembly
quality can affect the performance of the 32kHz oscillator.
Depending on the flux material used, the soldering
process can leave critical residues on the PCB surface.
High humidity and fast temperature cycles that cause
humidity condensation on the printed circuit board can
create process residuals. These process residuals cause
the insulation of the sensitive oscillator signal lines
towards each other and neighboring signals on the PCB
to decrease. High humidity can lead to moisture
condensation on the surface of the PCB and, together
with process residuals, reduce the surface resistivity of
the board. Flux residuals on the board can cause leakage
current paths, especially in humid environments.
Thorough PCB cleaning is therefore highly recommended
in order to achieve maximum performance by removing
flux residuals from the board after assembly. In general,
reduction of losses in the oscillator circuit leads to better
safety margin and reliability.
12.5
PCB Design Consideration
•
Signal traces between the device pins and the crystal
must be kept as short as possible. This minimizes
parasitic capacitance and sensitivity to crosstalk and
EMI. Note that the trace capacitances play a role in the
effective crystal load capacitance calculation.
routed as far away from the crystal connections as
possible. Crosstalk from these signals may disturb the
oscillator signal.
signals by routing them as far apart as possible.
•
Data lines and frequently switching signal lines should be
•
Reduce the parasitic capacitance between X1 and X2
•
The oscillation loop current flows between the crystal and
the load capacitors. This signal path (crystal to CL1 to
CL2 to crystal) should be kept as short as possible and
ideally be symmetric. The ground connections for both
capacitors should be as close together as possible.
Never route the ground connection between the
capacitors all around the crystal, because this long
ground trace is sensitive to crosstalk and EMI.
•
To reduce the radiation / coupling from oscillator circuit,
an isolated ground island on the GND layer could be
made. This ground island can be connected at one point
to the GND layer. This helps to keep noise generated by
the oscillator circuit locally on this separated island. The
ground connections for the load capacitors and the
oscillator should be connected to this island.
©2020 Renesas Electronics Corporation
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1338 Datasheet
Power Control
A precise, temperature-compensated voltage reference
and a comparator circuit provides power-control function
that monitors the
V
CC
level. The device is fully accessible
and data can be written and read when
V
CC
is greater
than V
PF
. However, when
V
CC
falls below V
PF
, the internal
clock registers are blocked from any access. If V
PF
is
less than V
BAT
, the device power is switched from
V
CC
to
V
BAT
when
V
CC
drops below V
PF
. If V
PF
is greater than
V
BAT
, the device power is switched from
V
CC
to V
BAT
when
V
CC
drops below V
BAT
. The registers are
maintained from the V
BAT
source until
V
CC
is returned to
nominal levels (Table 1). After
V
CC
returns above V
PF
,
read and write access is allowed after t
REC
(see the
“Power-Up/Down Timing” diagram).
Table 1. Power Control
Supply Condition
V
CC
< V
PF
, V
CC
<
V
BAT
V
CC
< V
PF
, V
CC
>
V
BAT
V
CC
> V
PF
, V
CC
<
V
BAT
V
CC
> V
PF
, V
CC
>
V
BAT
Read/Write
Access
No
No
Yes
Yes
Powered
By
V
BAT
V
CC
V
CC
V
CC
Power-up/down Timing
Table 2. Power-up/down Characteristics
Ambient Temperature -40 to +85C
Parameter
Recovery at Power-up
V
CC
Fall Time; V
PF(MAX)
to V
PF(MIN)
V
CC
Rise Time; V
PF(MIN)
to V
PF(MAX)
Symbol
t
REC
t
VCCF
t
VCCR
Conditions
(Note 1)
1338-18 (Note 2)
1338-31 (Note 2)
Min.
3
3
0
Typ.
Max.
2
Units
ms
ms
ms
µs
Note 1:
This delay applies only if the oscillator is running. If the oscillator is disabled or stopped, no power-up delay
occurs.
Note 2:
Measured at typical VBAT level.
©2020 Renesas Electronics Corporation
5
September 30, 2020
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