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1894KI-40LF

Description
Interface Circuit, 1-Trnsvr, CMOS
CategoryWireless rf/communication    Telecom circuit   
File Size542KB,54 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
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1894KI-40LF Overview

Interface Circuit, 1-Trnsvr, CMOS

1894KI-40LF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
package instructionHVQCCN, LCC40,.24SQ,20
Reach Compliance Codecompli
data rate100000 Mbps
JESD-30 codeS-XQCC-N40
JESD-609 codee3
length6 mm
Humidity sensitivity level3
Number of functions1
Number of terminals40
Transceiver quantity1
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC40,.24SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1 mm
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Telecom integrated circuit typesINTERFACE CIRCUIT
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width6 mm
DATASHEET
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-40
Description
The ICS1894-40 is a low-power, physical-layer device
(PHY) that supports the ISO/IEC 10Base-T and
100Base-TX Carrier-Sense Multiple Access/Collision
Detection (CSMA/CD) Ethernet standards, ISO/IEC
8802.3. It is intended for RMII/MII, Node/Repeater
applications and includes the Auto-MDIX feature that
automatically corrects crossover errors in plant wiring.
The ICS1894-40 incorporates Digital-Signal Processing
(DSP) control in its Physical-Medium Dependent (PMD)
sub-layer. As a result, it can transmit and receive data on
unshielded twisted-pair (UTP) category 5 cables with
attenuation in excess of 24 dB at 100MHz.
The ICS1894-40 provides a Serial-Management Interface
for exchanging command and status information with a
Station-Management (STA) entity. The ICS1894-40
Media-Dependent Interface (MDI) can be configured to
provide either half-duplex or full-duplex operation at data
rates of 10 Mb/s or 100Mb/s.
In addition, the ICS1894-40 includes a programmable LED
and interrupt output function. The LED outputs can be
configured through registers to indicate the occurance of
certain events such as LINK, COLLISION, ACTIVITY, etc.
The purpose of the programmable interrupt output is to
notify the PHY controller device immediately when a certain
event happens instead of having the PHY controller
continuously poll the PHY. The events that could be used to
generate interrupts are: receiver error, Jabber, page
received, parallel detect fault, link partner acknowledge, link
status change, auto-negotiation complete, remote fault,
collision, etc.
The ICS1894-40 has deep power modes that can result in
significant power savings when the link is broken.
Applications:
NIC cards, PC motherboards, switches,
routers, DSL and cable modems, game machines, printers,
network connected appliances, and industrial equipment.
Features
Supports category 5 cables and above with attenuation in
excess of 24dB at 100 MHz.
Single-chip, fully integrated PHY provides PCS, PMA,
PMD, and AUTONEG sub layers functions of IEEE
standard.
10Base-T and 100Base-TX IEEE 8802.3 compliant
MIIM (MDC/MDIO) management bus for PHY register
configuration
RMII interface support with external 50 MHz system clock
Single 3.3V power supply
Highly configurable, supports:
– Media Independent Interface (MII)
– Auto-Negotiation with Parallel detection
– Node applications, managed or unmanaged
– 10M or 100M full and half-duplex modes
– Loopback mode for Diagnostic Functions
Auto-MDI/MDIX crossover correction
Low-power CMOS (typically 300 mW)
Power-Down mode (typically 21mW)
Clock and crystal supported in MII mode
Programmable LEDs
Interrupt output pin
Fully integrated, DSP-based PMD includes:
– Adaptive equalization and baseline-wander
correction
– Transmit wave shaping and stream cipher
scrambler
– MLT-3 encoder and NRZ/NRZI encoder
Core power supply (3.3 V)
3.3 V/1.8 V VDDIO operation supported
Smart power control with deep power down feature
Available in 40-pin (6mm x 6mm) QFN package, Pb-free
Industrial Temp and Lead Free
Not recommended for new designs
— For full/half duplex RMII only interface support, please refer to ICS1894-43 datasheet.
— For full/half duplex MII only interface support, please refer to ICS1894-44 datasheet.
— ICS1894-43 and ICS1894-44 are pin-compatible with ICS1894-40.
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1
ICS1894-40
REV K 022412

1894KI-40LF Related Products

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Description Interface Circuit, 1-Trnsvr, CMOS Interface Circuit, 1-Trnsvr, CMOS Interface Circuit, 1-Trnsvr, CMOS Interface Circuit, 1-Trnsvr, CMOS
Is it Rohs certified? conform to conform to conform to conform to
Maker Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation
package instruction HVQCCN, LCC40,.24SQ,20 HVQCCN, LCC40,.24SQ,20 HVQCCN, LCC40,.24SQ,20 HVQCCN, LCC40,.24SQ,20
Reach Compliance Code compli compli compli compli
data rate 100000 Mbps 100000 Mbps 100000 Mbps 100000 Mbps
JESD-30 code S-XQCC-N40 S-XQCC-N40 S-XQCC-N40 S-XQCC-N40
JESD-609 code e3 e3 e3 e3
length 6 mm 6 mm 6 mm 6 mm
Humidity sensitivity level 3 3 3 3
Number of functions 1 1 1 1
Number of terminals 40 40 40 40
Transceiver quantity 1 1 1 1
Maximum operating temperature 85 °C 70 °C 70 °C 85 °C
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code HVQCCN HVQCCN HVQCCN HVQCCN
Encapsulate equivalent code LCC40,.24SQ,20 LCC40,.24SQ,20 LCC40,.24SQ,20 LCC40,.24SQ,20
Package shape SQUARE SQUARE SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 260 260
power supply 3.3 V 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1 mm 1 mm 1 mm 1 mm
Nominal supply voltage 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Telecom integrated circuit types INTERFACE CIRCUIT INTERFACE CIRCUIT INTERFACE CIRCUIT INTERFACE CIRCUIT
Temperature level INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 30 30 30 30
width 6 mm 6 mm 6 mm 6 mm
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