R5F103A9ASP#X0 datasheet, PDF - EEWORLD Datasheet

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R5F103A9ASP#X0: DescriptionR5F103A9ASP#X0; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1009KB，113 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/; Environmental Compliance

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R5F103A9ASP#X0 Overview

R5F103A9ASP#X0

R5F103A9ASP#X0 Parametric

Parameter Name	Attribute value
Brand Name	Renesas
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Renesas Electronics Corporation
Parts packaging code	LSSOP
package instruction	SSOP, SSOP30,.3
Contacts	30
Manufacturer packaging code	PLSP0030JB-B30
Reach Compliance Code	compli
Samacsys Descripti	RL78/G12
Has ADC	YES
Address bus width
bit size	16
CPU series	RL78
maximum clock frequency	20 MHz
DMA channel	YES
External data bus width
JESD-30 code	R-PDSO-G30
length	6.5 mm
Number of I/O lines	26
Number of terminals	30
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP30,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/5 V
Certification status	Not Qualified
RAM (bytes)	1024
rom(word)	12288
ROM programmability	FLASH
speed	24 MHz
Maximum slew rate	5.5 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	2.7 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

User Manual

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Datasheet

RL78/G12

RENESAS MCU

R01DS0193EJ0230

Rev.2.30

Jun 19, 2020

True low-power platform (63

μA/MHz)

for the general-purpose applications, with 1.8-V to 5.5-V operation,

2- to 16-Kbyte code flash memory, and 31 DMIPS at 24 MHz

1. OUTLINE

1.1 Features

Ultra-low power consumption technology



= single power supply voltage of 1.8 to 5.5 V which

can operate at a low voltage



HALT mode



STOP mode



SNOOZE mode

RL78 CPU core



CISC architecture with 3-stage pipeline



Minimum instruction execution time: Can be changed

from high speed (0.04167

s:

@ 24 MHz operation with

high-speed on-chip oscillator) to ultra-low speed (1

s:

@ 1 MHz operation)



Address space: 1 MB



General-purpose registers: (8-bit register x 8) x 4 banks



On-chip RAM: 256 B to 2 KB

Code flash memory



Code flash memory: 2 to 16 KB



Block size: 1 KB



Prohibition of block erase and rewriting (security

function)



On-chip debug function

Self-programming (with flash shield window function)

A/D converter



8/10-bit resolution A/D converter (V

= 1.8 to 5.5 V)



8 to 11 channels, internal reference voltage (1.45 V),

and temperature sensor

Note

I/O port



I/O port: 18 to 26

(N-ch open drain I/O [withstand voltage of 6 V]: 2,

N-ch open drain I/O [V

withstand voltage]: 4 to 9)



Can be set to N-ch open drain, TTL input buffer, and

on-chip pull-up resistor



Different potential interface: Can connect to a 1.8/2.5/3

V device



On-chip key interrupt function



On-chip clock output/buzzer output controller

Others



On-chip BCD (binary-coded decimal) correction circuit

Note

Can be selected only in HS (high-speed main)

mode.

Remark

The functions mounted depend on the product.

See

1.7 Outline of Functions.

DMA (Direct Memory Access) controller

Note



2 channels



Number of clocks during transfer between 8/16-bit SFR

and internal RAM: 2 clocks

Multiplier and divider/multiply-accumulator



16 bits x 16 bits = 32 bits (Unsigned or signed)



32 bits x 32 bits = 32 bits (Unsigned)



16 bits x 16 bits + 32 bits = 32 bits (Unsigned or

signed)

Serial interface



CSI



UART



Simplified I

C communication



C communication

: 1 to 3 channels

: 0 to 3 channels

: 1 channel



Timer



16-bit timer

: 4 to 8 channels



12-bit interval timer : 1 channel



Watchdog timer

: 1 channel (operable with the

dedicated low-speed on-chip

oscillator)

Data flash memory

Note



Data flash memory: 2 KB



Back ground operation (BGO): Instructions are

executed from the program memory while rewriting the

data flash memory.



Number of rewrites: 1,000,000 times (TYP.)



Voltage of rewrites: V

= 1.8 to 5.5 V

High-speed on-chip oscillator



Select from 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz,

4 MHz, 3 MHz, 2 MHz, and 1 MHz



High accuracy: +/- 1.0 % (V

= 1.8 to 5.5 V, T

= -20

to +85 °C)

Operating ambient temperature



= -40 to +85 °C (A: Consumer applications, D:

Industrial applications)



= -40 to +105 °C (G: Industrial applications)

Note

Power management and reset function



On-chip power-on-reset (POR) circuit



On-chip voltage detector (LVD) (Select interrupt and

reset from 12 levels)

R01DS0193EJ0230 Rev.2.30

Jun 19, 2020

Page 1 of 108

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