Ordering Information .................................................................................................................................................................... 2
Device Configurations and Pin-outs ............................................................................................................................................. 9
Pin-out Top Views................................................................................................................................................................. 9
Test Circuit Diagrams for LVCMOS and Clipped Sinewave Outputs ......................................................................................... 10
Frequency Stability ............................................................................................................................................................. 16
Output Frequency and Format............................................................................................................................................ 16
Output Frequency Tuning ................................................................................................................................................... 16
Pin 1 Configuration (OE, VC, or NC) .................................................................................................................................. 17
Control Voltage Bandwidth ................................................................................................................................................. 20
Pull Range and Average Pull Range .................................................................................................................................. 22
Output Frequency ............................................................................................................................................................... 23
I
2
C Control Registers .......................................................................................................................................................... 25
Serial Interface Configuration Description .......................................................................................................................... 28
Serial Signal Format ........................................................................................................................................................... 28
Parallel Signal Format ........................................................................................................................................................ 29
Parallel Data Format ........................................................................................................................................................... 29
I
2
C Timing Specification ...................................................................................................................................................... 31
I
2
C Device Address Modes ................................................................................................................................................. 32
Schematic Example ............................................................................................................................................................ 33
Dimensions and Patterns ........................................................................................................................................................... 34
[i=s]This post was last edited by babyking on 2018-11-30 16:51[/i] [color=#333333][font=微软雅黑][size=18px]Today I got a Corethink development board, model SIN-A33, which uses Allwinner's A33 chip. Unlik...
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Since 2018, the field of artificial intelligence chips has been very lively. Especially in China, the rich vertical application scenarios have provided fertile ground for the development of AI chip...[Details]