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Revision 1.0 (05-11-12)
2
SMSC LAN8740/LAN8740i
PRODUCT PREVIEW
Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR
®
Technology
General Description
The LAN8740/LAN8740i is a low-power 10BASE-T/100BASE-TX physical layer (PHY) transceiver with
variable I/O voltage that is compliant with the IEEE 802.3, 802.3u, and 802.3az (Energy Efficient
Ethernet) standards. Energy Efficient Ethernet (EEE) support results in significant power savings during
low link utilizations.
The LAN8740/LAN8740i supports communication with an Ethernet MAC via a standard MII (IEEE
802.3u)/RMII interface. It contains a full-duplex 10-BASE-T/100BASE-TX transceiver and supports 10
Mbps (10BASE-T) and 100 Mbps (100BASE-TX) operation. The LAN8740/LAN8740i implements auto-
negotiation to automatically determine the best possible speed and duplex mode of operation. HP
Auto-MDIX support allows the use of direct connect or cross-over LAN cables. Integrated Wake on
LAN (WoL) support provides a mechanism to trigger an interrupt upon reception of a perfect DA,
broadcast, magic packet, or wakeup frame.
The LAN8740/LAN8740i supports both IEEE 802.3-2005 compliant and vendor-specific register
functions. However, no register access is required for operation. The initial configuration may be
selected via the configuration pins. Register-selectable configuration options may be used to further
define the functionality of the transceiver.
The LAN8740/LAN8740i can be programmed to support wake-on-LAN at the physical layer, allowing
detection of configurable Wake-up Frame and Magic packets. This feature allows filtering of packets
at the PHY layer, without requiring MAC intervention. Additionally, the LAN8740/LAN8740i supports
cable diagnostics which allow the device to identify opens/shorts and their location on the cable via
vendor-specific registers.
Per IEEE 802.3-2005 standards, all digital interface pins are tolerant to 3.6 V. The device can be
configured to operate on a single 3.3 V supply utilizing an integrated 3.3 V to 1.2 V linear regulator.
The linear regulator may be optionally disabled, allowing usage of a high efficiency external regulator
for lower system power dissipation.
The LAN8740/LAN8740i is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C)
temperature range versions. A typical system application is shown in
Figure 1. Figure 2
provides an
internal block diagram of the device.
10/100
Ethernet
MAC
MII/
RMII
LAN8740/
LAN8740i
MDI
Transformer
RJ45
Mode
LED
Crystal or
Clock
Oscillator
Figure 1 System Block Diagram
SMSC LAN8740/LAN8740i
3
Revision 1.0 (05-11-12)
PRODUCT PREVIEW
Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR
®
Technology
MODE[0:2]
nRST
RMIISEL
TXD[0:3]
TXEN
TXER
Mode Control
Reset Control
SMI
Auto-
Negotiation
100M TX
Logic
100M
Transmitter
HP Auto-MDIX
TXP/TXN
RXP/RXN
Transmitter
Management
Control
10M TX
Logic
10M
Transmitter
MDIX
Control
XTAL1/CLKIN
TXCLK
PLL
RMII/MII Logic
100M RX
Logic
WoL
10M RX
Logic
DSP System:
Clock
Data Recovery
Equalizer
RXD[0:3]
RXDV
RXER
RXCLK
CRS
COL/CRS_DV
MDC
MDIO
XTAL2
Analog-to-
Digital
100M PLL
Interrupt
Generator
LEDs
nINT
LED1
LED2
Receiver
10M PLL
Squeltch
& Filters
Central Bias
PHY Address
Latches
RBIAS
PHYAD[0:2]
LAN8740/LAN8740i
Figure 2 Architectural Overview
Revision 1.0 (05-11-12)
4
SMSC LAN8740/LAN8740i
PRODUCT PREVIEW
Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR
®
Technology
Package Outline
Figure 3 32-SQFN Package
Table 1 32-SQFN Dimensions
A
A1
D/E
D2/E2
L
b
k
e
MIN
0.80
0
4.90
3.20
0.35
0.18
0.35
Notes:
1. All dimensions are in millimeters unless otherwise noted.
2. Dimension “b” applies to plated terminals and is measured between 0.15 and 0.30 mm from the
terminal tip.
3. The pin 1 identifier may vary, but is always located within the zone indicated.
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