Z84C42AD2 datasheet, PDF - EEWORLD Datasheet

Z84C42AD2: Description2 CHANNEL(S), 800Kbps, SERIAL COMM CONTROLLER, CDIP40, CERAMIC, DIP-40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size786KB，24 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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Z84C42AD2 Overview

2 CHANNEL(S), 800Kbps, SERIAL COMM CONTROLLER, CDIP40, CERAMIC, DIP-40

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	STMicroelectronics
Parts packaging code	DIP
package instruction	CERAMIC, DIP-40
Contacts	40
Reach Compliance Code	_compli
Other features	MODEM CONTROL I/OS USABLE AS GENERAL PURPOSE I/OS
Address bus width	1
boundary scan	NO
Bus compatibility	Z80
maximum clock frequency	4 MHz
letter of agreement	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC
Data encoding/decoding methods	NRZ
Maximum data transfer rate	0.09765625 MBps
External data bus width	8
JESD-30 code	R-CDIP-T40
JESD-609 code	e0
low power mode	YES
Number of DMA channels
Number of I/O lines
Number of serial I/Os	2
Number of terminals	40
On-chip data RAM width
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	WDIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE, WINDOW
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	0
Maximum slew rate	6 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

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