EEWORLDEEWORLDEEWORLD

Part Number

Search

CDR35BP472BFZRAC

Description
CAPACITOR, CERAMIC, MULTILAYER, 100 V, BP, 0.0047 uF, SURFACE MOUNT, 1825, CHIP
CategoryPassive components    capacitor   
File Size104KB,11 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric View All

CDR35BP472BFZRAC Overview

CAPACITOR, CERAMIC, MULTILAYER, 100 V, BP, 0.0047 uF, SURFACE MOUNT, 1825, CHIP

CDR35BP472BFZRAC Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerVishay
package instruction, 1825
Reach Compliance Codecompli
ECCN codeEAR99
capacitance0.0047 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
JESD-609 codee0
Manufacturer's serial numberCDR
Installation featuresSURFACE MOUNT
multi-layerYes
negative tolerance1%
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package shapeRECTANGULAR PACKAGE
method of packingTR, PUNCHED PAPER, 7 INCH
positive tolerance1%
Rated (DC) voltage (URdc)100 V
GuidelineMIL-PRF-55681
size code1825
surface mountYES
Temperature characteristic codeBP
Temperature Coefficient30ppm/Cel ppm/°C
Terminal surfaceTin/Lead (Sn/Pb) - with Nickel (Ni) barrie
Terminal shapeWRAPAROUND
CDR-MIL-PRF-55681
Vishay Vitramon
Multilayer Ceramic Chip Capacitors,
Qualified, Type CDR
FEATURES
Military qualified products
ELECTRICAL SPECIFICATIONS
NOTE:
Electrical characteristics at + 25 °C unless otherwise
specified.Capacitance
Range:
1.0 pF to 0.47 µF
Voltage - Temperature Limits:
BP: 0 ± 30 ppm/°C from - 55 °C to + 125 °C, with 0 Vdc applied
BX: ± 15 % from - 55 °C to + 125 °C, with 0 Vdc applied
BX: + 15, - 25 % from - 55 °C to + 125 °C, with 100 % rated Vdc applied
Federal stock control number, CAGE CODE 95275
High reliability tested per MIL-PRF-55681
Lead (Pb)-free applied for “Y” and “M” termination code
Tin/Lead “Z” and “U” termination codes available
Available
RoHS*
COMPLIANT
Insulation Resistance (IR):
At + 25 °C and rated voltage 100 000 MΩ minimum or
1000
ΩF,
whichever is less
Delectric Withstanding Voltage (DWV):
This is the maximum voltage the capacitors are tested for a
1 to 5 second period and the charge/discharge current does
not exceed 50 mA.
100 Vdc: DWV at 250 % of rated voltage
Dissipation Factor (DF):
BP: 0.15 % maximum; BX: 2.5 % maximum
Test Frequency: 1 MHz ± 50 kHz for BP capacitors
1000 pF
and for BX capacitors
100 pF
All other BP and BX capacitors are tested at 1 kHz ± 50 Hz
DIMENSIONS
in inches [millimeters]
L
W
T
(Max. )
P
MIL-PRF-55681
/1
STYLE
CDR01
CDR02
CDR03
CDR04
CDR06
CDR31
CDR32
CDR33
CDR34
CDR35
/3
/7
/8
/9
/10
/11
LENGTH
(L)
0.080 ± 0.015 [2.03 ± 0.38]
0.180 ± 0.015 [4.57 ± 0.38]
0.180 ± 0.015 [4.57 ± 0.38]
0.180 ± 0.015 [4.57 ± 0.38]
0.220 ± 0.010 [5.59 ± 0.25]
0.078 ± 0.008 [2.00 ± 0.20]
0.125 ± 0.008 [3.20 ± 0.20]
0.125 ± 0.010 [3.20 ± 0.25]
0.176 ± 0.010 [4.50 ± 0.25]
0.176 ± 0.012 [4.50 ± 0.30]
WIDTH
(W)
0.050 ± 0.015 [1.27 ± 0.38]
0.050 ± 0.015 [1.27 ± 0.38]
0.080 ± 0.015 [2.03 ± 0.38]
0.125 ± 0.015 [3.20 ± 0.38]
0.250 ± 0.010 [6.35 ± 0.25]
0.049 ± 0.008 [1.25 ± 0.20]
0.062 ± 0.008 [1.60 ± 0.20]
0.098 ± 0.010 [2.50 ± 0.25]
0.125 ± 0.010 [3.20 ± 0.25]
0.250 ± 0.012 [6.40 ± 0.30]
THICKNESS (T)
(Max.)
0.055 [1.40]
0.055 [1.40]
0.080 [2.03]
0.080 [2.03]
0.045 [1.14]
0.051 [1.30]
0.051 [1.30]
0.059 [1.50]
0.059 [1.50]
0.059 [1.50]
TERM. (P)
(Min.)
(Max.)
0.010 [0.25]
0.030 [0.76]
0.010 [0.25]
0.030 [0.76]
0.010 [0.25]
0.030 [0.76]
0.010 [0.25]
0.030 [0.76]
0.010 [0.25]
0.030 [0.76]
0.012 [0.30]
0.028 [0.70]
0.012 [0.30]
0.028 [0.70]
0.010 [0.25]
0.030 [0.76]
0.010 [0.25]
0.030 [0.76]
0.008 [0.20]
0.032 [0.80]
ORDERING INFORMATION - MILITARY
CDR31
BX
102
A
DC
MILITARY DIELECTRIC CAPACITANCE
NOMINAL
VOLTAGE
STYLES
CODE
RATING
1)
BP and BX Expressed in
A = 50 V
CDR01
picofarads
B = 100 V
CDR02
(pF). The first
CDR03
two digits are
CDR04
significant,
CDR06
the third is
CDR31
a multiplier.
CDR32
Examples:
CDR33
102 = 1000 pF
CDR34
1R8 = 1.8 pF
CDR35
K
CAPACITANCE
TOLERANCE
C = ± 0.25 pF
D = ± 0.5 pF
F=±1%
J=±5%
K = ± 10 %
M = ± 20 %
Y
TERMINATION
Y = Ni barrier with 100 % tin
W = Ni barrier with 100 %
tin or tin/lead plate with min.
4 % lead
Z = Ni barrier with tin/lead
plate min. 4 % lead
M = AgPd
U = Ni barrier with solder
coated (tin/lead alloy,
with a minimum of 4
percent lead)
S
FAILURE
RATE
M = 1.0 %
P = 0.1 %
R = 0.01 %
S = 0.001 %
Consult
factory for
failure rate
status
A
MARKING
A = Unmarked
T
PACKAGING
T = 7" reel/plastic tape
J = 7" reel/plastic tape (low qty)
C = 7" reel/paper tape
R = 11 1/4" reel/plastic tape
P = 11 1/4" reel/paper tape
B = Bulk
Note
1. DC voltage rating should not be exceeded in application
2. MIL-PFR_55681 “U” Termination part number code for CDR product length,width and thickness dimensions positive tolerances (including
bandwidth) above are allowed to increase by the following amounts:
Length
Width/Thickness
CDR01
0.020 [0.51]
0.015 [0.38]
CDR02-06
0.025 [0.64]
0.015 [0.38]
CDR31-35
0.023 [0.60]
0.012 [0.30]
* Pb containing terminations are not RoHS compliant, exemptions may apply
www.vishay.com
45
For technical questions, contact: mlcc.specials@vishay.com
Document Number 45026
Revision: 04-Sep-06
External RAM issues with F2812
I made an experimental board with DSP2812 as the core, and expanded it with a 64K RAM. However, when downloading the program, if I point .cinit to the external RAM, it cannot be downloaded. If I do no...
智能abc Microcontroller MCU
When printing the device diagram in DXP, the lines are all virtual. How to modify it?
I print the component diagram in DXP, the order is File-Fabrication outputs-Final. Here are all the connection diagrams and diagrams for placing components. I need to print the component diagram, but ...
laixianzhu Embedded System
How to debug keil uvision4 and protues7.7
How to debug keil uvision4 and protues7.7, please help...
bh00061125 51mcu
Learn from TI videos
The company's project was completed not long ago. I saw EEWorld and TI working hard to create the Value line. I was excited to think that the thing I just completed was made with TI. I registered not ...
xjq001 Microcontroller MCU
Xilinx FPGA Data Sharing
[i=s] This post was last edited by tao282515641 on 2014-1-23 10:37 [/i] Xilinx experimental training materials sharing:)...
tao282515641 FPGA/CPLD
triode
As shown in the figure, the transistor has the function of current amplification, but how to apply this function? How to achieve signal amplification in the figure below? I don’t understand. Thank you...
JERRR Analog electronics

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 394  538  759  1909  1534  8  11  16  39  31 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号