EEWORLDEEWORLDEEWORLD

Part Number

Search

SH050M0033B3S80611

Description
Aluminum Electrolytic Capacitor, Polarized, Aluminum (wet), 50V, 20% +Tol, 20% -Tol, 33uF, Through Hole Mount, RADIAL LEADED, ROHS COMPLIANT
CategoryPassive components    capacitor   
File Size62KB,3 Pages
ManufacturerYAGEO
Websitehttp://www.yageo.com/
Environmental Compliance  
Download Datasheet Parametric View All

SH050M0033B3S80611 Overview

Aluminum Electrolytic Capacitor, Polarized, Aluminum (wet), 50V, 20% +Tol, 20% -Tol, 33uF, Through Hole Mount, RADIAL LEADED, ROHS COMPLIANT

SH050M0033B3S80611 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerYAGEO
package instruction,
Reach Compliance Codecompli
ECCN codeEAR99
capacitance33 µF
Capacitor typeALUMINUM ELECTROLYTIC CAPACITOR
dielectric materialsALUMINUM (WET)
leakage current0.0195 mA
Manufacturer's serial numberSH
Installation featuresTHROUGH HOLE MOUNT
negative tolerance20%
Number of terminals2
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
Package shapeCYLINDRICAL PACKAGE
method of packingBULK
polarityPOLARIZED
positive tolerance20%
Rated (DC) voltage (URdc)50 V
ripple current105 mA
surface mountNO
Delta tangent0.12
Terminal shapeWIRE
YAGEO CORPORATION
ALUMINUM ELECTROLYTIC CAPACITORS
Miniature Size Aluminum
Electrolytic Capacitors
SH
[ For General ]
105°C Single-Ended Lead Aluminum Electrolytic Capacitors
for the Rated Voltage up to 450V
ELECTRICAL CHARACTERISTICS
Operating Temperature : -40° ~ +105°C / -25°~ +105°C
Working Voltage : 6.3 ~ 100V / 160 ~ 450V
Rate Capacitance Range : 0.1 ~ 15000µF / 0.1 ~ 15000µF
Capacitance Tolerance : -20 ~ +20%
DC Leakage Current (µA) : 0.01CV +3 / 0.03CV+10
( Measurements shall be made after a2 minute charge at rated working voltage at 25°C )
Dissipation Factor : at 120 Hz, 25°C
W V (V) : 6.3
10
16
25
35
50
63 ~ 100
160 ~ 250
350 ~ 450
D.F (%) : 26
22
18
16
14
12
10
15
20
For capacitor whose capacitance excceds 1000µF. The value of DF(%) is increased by 2% for every
addition of 1000µF.
W V (V)
:
6.3
4
8
10
3
6
16
2
4
25
2
3
35 ~ 100
2
3
160 ~ 250 350 ~ 450
4
8
4
8
DESCRIPTION
Long life for 2,000 hours at 105°C, ideally suited
for high quality and high reliability applications.
Feature High CV Product
Impedance : Z - 25°C / Z + 25°C
Z - 40°C / Z + 20°C
Load Life : 2000 Hours at 105°C Assured with Full Rated Maximum Ripple Current Applied
Multiplier for Ripple Current
Frequency (Hz)
6.3~100V Below~68µF
6.3~100V 100~470µF
6.3~100V 471~22000µF
160~450V ALL Cap(µF)
120
1.00
1.00
1.00
1.00
300
1.30
1.23
1.10
1.25
1K
1.57
1.34
1.13
1.40
10K~100K
2.00
1.50
1.15
1.60
(a) Capacitance Change : Within 20% of Initial Value
(b) Dissipation Factor : Not Exceed 200% of Initial Requirement
(c) Leakage Current : Not Exceed the Initial Requirement
Shelf Life : 1000 Hours, No Voltage Applied
(a) Capacitance Change : Within 20% of Initial Value
(b) Dissipation Factor : Not Exceed 200% of Initial Requirement
(c) Leakage Current : Not Exceed 200% of Initial Requirement
Temperature(°C)
Factor
65
1.70
85
1.40
105
1.00
Dimensions : mm
Rubber Stand-off
4.0
Rubber End Seal
DIAGRAM OF DIMENSIONS
F
1.5
2.0
2.5
3.5
5.0
0.45
0.5
Vinyl Sleeve
(P.V.C)
Rubber End Seal
Vinyl Sleeve
(P.V.C)
5.0
6.0
8.0
10.0
12.0
13.0
16.0
18.0
22.0
F 0.5
F 0.5
0.4Max.
15Min.
0.6
L
15Min.
5Min.
D 0.5
L
5Min.
D 0.5
7.5
10.0
0.8
0.8
How to evaluate the low power consumption of FPGA?
Recently, everyone is analyzing the data on FPGA low power consumption.I'll join in the fun,Let’s discuss with you how to define low power consumption of FPGA.To be honest, I didn’t pay much attention...
wstt FPGA/CPLD
Analysis of the "Signal" topic in the National College Student Electronics Contest
1. Previous " Signal Source " Competition Topics In the 11th National Undergraduate Electronic Design Competition, there were only five signal source questions [ 1] : ①Signal Generator (8th session , ...
宋元浩 Electronics Design Contest
Matlab Lesson 4 - Polynomial Arrays
Setting ranges and drawing! [[i] This post was last edited by gaoxiao on 2009-6-12 14:20 [/i]]...
gaoxiao Microcontroller MCU
Xilinx clock management
Hello everyone! How do you manage the clock in ise?...
applelonger FPGA/CPLD
Find the right solution
Hello everyone, I am looking for an ARM solution, Ubuntu system, CPU can be 6410 or other, need a full set of information, preferably a ready-made solution, which can be used with a little modificatio...
tryagain1 Linux and Android
I have just started learning Cadence Virtuoso and found that as long as the schematic diagram appears in the parallel inductor simulation, an error will be reported.
I have just started learning Cadence Virtuoso, and I found that whenever there is a parallel inductor simulation in the schematic diagram, it will report an error that the parallel inductor forms a sh...
非标准理工男 Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1713  2170  37  2851  2124  35  44  1  58  43 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号