CY39100Z484B-83BBI datasheet, PDF

Datasheet> All Categories > Programmable logic devices> Programmable logic> CY39100Z484B-83BBI

CY39100Z484B-83BBI: DescriptionLoadable PLD, 15ns, 1536-Cell, CMOS, PBGA484, 23 X 23 MM, 1.60 MM HEIGHT, 1 MM PITCH, TFBGA-484; CategoryProgrammable logic devices Programmable logic; File Size73KB，3 Pages; ManufacturerCypress Semiconductor

Download Datasheet Parametric View All

CY39100Z484B-83BBI Overview

Loadable PLD, 15ns, 1536-Cell, CMOS, PBGA484, 23 X 23 MM, 1.60 MM HEIGHT, 1 MM PITCH, TFBGA-484

CY39100Z484B-83BBI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	BGA
package instruction	23 X 23 MM, 1.60 MM HEIGHT, 1 MM PITCH, TFBGA-484
Contacts	484
Reach Compliance Code	compli
Other features	YES
In-system programmable	YES
JESD-30 code	S-PBGA-B484
JTAG BST	YES
length	23 mm
Dedicated input times
Number of I/O lines	302
Number of macro cells	1536
Number of terminals	484
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	0 DEDICATED INPUTS, 302 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	LBGA
Encapsulate equivalent code	BGA484,22X22,40
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.5/3.3,1.8 V
Programmable logic type	LOADABLE PLD
propagation delay	15 ns
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage	1.95 V
Minimum supply voltage	1.65 V
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	23 mm

Preview

Download Datasheet

View All

PRELIMINARY

Using the Delta39K™ ISR™ Prototype Board

Introduction

This application note is intended to provide instruction in the

use of the Delta39K™ ISR™ Prototype Board. This board

serves two major purposes. First, it provides a board with

Cypress Delta39K and Ultra37000™ CPLDs already con-

nected to take advantage of In-System Reprogrammability™

(ISR). This allows designers who are unfamiliar with ISR to

investigate it as a possible device programming solution.

Second, it permits designers who need custom logic to more

easily utilize Cypress CPLDs in prototype designs. After pro-

gramming the Delta39K and/or Ultra37000 devices on the

ISR Prototype Board, connections can be made between the

ISR Prototype Board and the designer’s board using the pro-

vided header strips. This gives a designer the ability to verify

the functionality of the CPLDs within a system before design-

ing them into that system.

This application note should familiarize the reader in the use

of the Delta39K ISR Prototype Board and highlight the

board’s features. Topics of discussion will include connecting

the programming cable, connecting power supplies to the

board, using the jumpers on the board, and making connec-

tions between the Delta39K ISR Prototype Board and other

systems.

In-System Reprogrammability allows Complex Programma-

ble Logic Devices (CPLDs) to be reprogrammed after being

soldered in place on a printed circuit board. The Delta39K ISR

Prototype Board is designed to support one Delta39K and

Ultra37000 CPLD. The first device is a 100,000 gate 3.3V

Delta39K100 in a 208-pin PQFP package. The second device

is a 256 macrocell 3.3V Ultra37000 in a 160-pin TQFP pack-

age.

ISR programming of the CPLDs follows the IEEE 1149.1 stan-

dard Test Access Port and Boundary Scan architecture,

which supports chaining more than one IEEE1149.1/

JTAG -compliant devices together. ISR Programming Soft-

ware supports daisy-chain programming of multiple Cypress

CPLDs.

Delta39K and Ultra37000 CPLDs support the STAPL stan-

dard as the solution for ISR programming. STAPL is an inter-

preted language that provides a standard for programming

PLDs through the JTAG interface. The CPLDs on the

Delta39K ISR Prototype Board are programmed through an

ISR cable using the Cypress ISR Programming Software. To

learn more about the ISR features of the Delta39K and

Ultra37000 family, refer to Cypress application notes at our

website (http://www.cypress.com/pld/pldappnotes.html)

D e s ig n

F ile s

W arp S oftw are

S y n th e s is a n d F ittin g

O u tp u t D a ta F ile s

(H E X / J E D )

IS R P rogram m ing S oftw are

STAPL

C om poser

S T A P L P ro g ra m m in g

F ile s

STAPL

P la ye r

D e lta 3 9 K / U ltra 3 7 0 0 0

D e v ic e

Figure 1. Cypress CPLD Design Flow

synthesized into logic. Fitter software is responsible for map-

ping the logic into the targeted device. Both synthesis and

fitting are accomplished from the

Warp™

environment. The

result of the fitting process is a compressed Intel Hex file

(Delta39K) or a JEDEC file (Ultra37000) that contains the in-

formation about how the logic of the design will be implement-

ed in the device. STAPL Composer software uses the output

files from

Warp

to produce STAPL standard programming

files. A STAPL file contains both the programming data and

programming algorithm for the device it targets. A STAPL

Player is then used to program the CPLDs using the STAPL

Design Flow

In order to use the Delta39K ISR Prototype Board, it is impor-

tant to understand how it fits into the ISR design flow. The

basic design flow for the Cypress CPLD is shown in

Figure 1.

Designs are typically specified in VHDL or Verilog code. This

code can either be written by the designer or generated from

schematics. Once the code for the design is complete, it is

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

January 19, 2001

Recommended Resources

High frequency crystal oscillator circuit diagram

5 output converter circuit diagram for digital panel meter

Strain gauge force measurement interface circuit

Long delay circuit diagram 2

LED-parallel LED digital tube dynamic scanning display circuit (common anode)

Electrical connection diagram of five power unit series inverter

2812 internal SRAM problem: I recently made a 2812 board, but found that the SRAM memory L0 and L1 cannot be read or written. I would like to ask you the possible reasons. Thank you in advance....; zcwell Microcontroller MCU

Share a domestic chip 32-bit M4 microcontroller - AT32F421 series (extreme cost performance): The AT32F421 series MCU has built-in high-speed embedded memory, which can support up to 64KB flash memory (Flash) and 16KB random access memory (SRAM), and has a built-in digital signal processor (DS...; sparks- Domestic Chip Exchange

First aid: Has anyone used Microsoft's DTM (driver test manager), please come in~~!: Has anyone configured Microsoft DTM? Can you tell me how to do it? Please! The studio and controller are installed in win2003 server, and the client is installed in win xp. When testing the driver, th...; tornadofeng Embedded System

TI Medical Electronics Technology Forum Announcement: ...; wstt Microcontroller MCU

[Atmel SAM R21 Creative Competition Weekly Plan] + Keil MDK Develop the First SAM R21 Project: [align=left] [/align][align=left] [/align][align=left] [/align][align=left]Keil MDK[font=黑体]Development[/font][font=Times New Roman]SAM R21[/font][font=黑体]First Project[/font][/align][align=left] [/al...; mars4zhu Microchip MCU

CC2430 Basic Program: It will be helpful for those who intend to learn ZigBee....; 潜水鱼 MCU

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components