341M-XX datasheet, PDF - EEWORLD Datasheet

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341M-XX: DescriptionClock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8; CategoryThe embedded processor and controller Microcontrollers and processors; File Size215KB，9 Pages; ManufacturerIDT (Integrated Device Technology)

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341M-XX Overview

Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8

341M-XX Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	0.150 INCH, SOIC-8
Contacts	8
Reach Compliance Code	unknow
ECCN code	EAR99
JESD-30 code	R-PDSO-G8
JESD-609 code	e0
length	4.9 mm
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Master clock/crystal nominal frequency	50 MHz
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage	3.45 V
Minimum supply voltage	3.15 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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DATASHEET

FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

Description

The ICS341 is a low cost, single-output, field programmable

clock synthesizer. The ICS341 can generate an output

frequency from 250 kHz to 200 MHz and may employ

Spread Spectrum techniques to reduce system

electro-magnetic interference (EMI).

Using IDT’s VersaClock

™

software to configure the PLL and

output, the ICS341 contains a One-Time Programmable

(OTP) ROM to allow field programmability. Programming

features include 4 selectable configuration registers.

The device employs Phase-Locked Loop (PLL) techniques

to run from a standard fundamental mode, inexpensive

crystal, or clock. It can replace multiple crystals and

oscillators, saving board space and cost.

The device also has a power-down feature that tri-states the

clock outputs and turns off the PLLs when the PDTS pin is

taken low.

The ICS341 is also available in factory programmed custom

versions for high-volume applications.

ICS341

Features

•

8-pin SOIC package

•

Highly accurate frequency generation

•

M/N Multiplier PLL: M = 1...2048, N = 1...1024

•

Output clock frequencies up to 200 MHz

•

Four ROM locations for frequency and spread selection

•

Spread spectrum capability for lower system EMI

•

Center or Down Spread up to 4% total

•

Selectable 32 kHz or 120 kHz modulation

•

Input crystal frequency from 5 to 27 MHz

•

Input clock frequency from 2 to 50 MHz

•

Operating voltage of 3.3 V

•

Advanced, low-power CMOS process

•

For two output clocks, use the ICS342. For three output

•

clocks, see the ICS343. For more than three outputs, see

the ICS345 or ICS348.

Available in Pb (lead) free packaging

NOTE: EOL for non-green parts to occur on 5/13/10

per PDN U-09-01

Block Diagram

VDD

S1:0

Crystal or

clock input

X1/ICLK

OTP ROM

with PLL

Divider

Values

PLL Clock Synthesis,

Spred Spectrum and

Control Circuitry

CLK

Crystal

Oscillator

External capacitors are

required with a crystal input.

GND

PDTS (output and PLL)

IDT™ / ICS™

FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER 1

ICS341

REV K 092109

341M-XX Related Products

	341M-XX	341MIPT	341MI-XXT	341MI-XX
Description	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8
Parts packaging code	SOIC	SOIC	SOIC	SOIC
package instruction	0.150 INCH, SOIC-8	0.150 INCH, SOIC-8	0.150 INCH, SOIC-8	0.150 INCH, SOIC-8
Contacts	8	8	8	8
Reach Compliance Code	unknow	not_compliant	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99
JESD-30 code	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e0	e0	e0	e0
length	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Number of terminals	8	8	8	8
Maximum operating temperature	70 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-	-40 °C	-40 °C	-40 °C
Maximum output clock frequency	200 MHz	200 MHz	200 MHz	200 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Master clock/crystal nominal frequency	50 MHz	50 MHz	50 MHz	50 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	Tin/Lead (Sn85Pb15)	TIN LEAD	TIN LEAD
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Maker	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

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