EEWORLDEEWORLDEEWORLD

Part Number

Search

5962R1022901QYC

Description
Synchronous DRAM
Categorystorage    storage   
File Size1MB,69 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

5962R1022901QYC Overview

Synchronous DRAM

5962R1022901QYC Parametric

Parameter NameAttribute value
MakerCobham Semiconductor Solutions
package instruction,
Reach Compliance Codeunknow
Memory IC TypeSYNCHRONOUS DRAM
Certification statusNot Qualified
total dose100k Rad(Si) V
Standard Products
UT8SDMQ64M40 2.5-Gigabit SDRAM MCM
UT8SDMQ64M48 3.0-Gigabit SDRAM MCM
Datasheet
October 18, 2013
FEATURES
Organized as 64M x 40 (16Meg x 40 x 4 banks) and 64M
x 48 (16Meg x 48 x 4 banks)
Single 3.3V power supply
Maximum frequency: 100 MHz
Operation -40
o
C to +105
o
C
LVTTL compatible with multiplexed address
Fully synchronous; all signals registered on positive edge
of system clock
Internal pipelined operation; column address can be
changed every clock cycle
Programmable burst lengths: 1,2,4,8, or full page
Auto-precharge, includes concurrent auto precharge, and
auto-refresh mode
32ms, 8,192-cycle refresh
Operational environment:
- Total dose: 100 krad(Si)
- SEL Immune 111 MeV-cm
2
/mg
- SEU Event Rate: 1.3E-10 events/bit-day assuming
geosynchronous orbit and Adam’s 90% worst-case
environment
Package options:
- 128-lead Ceramic Quad Flatpack, shallow side-braze
- 128-lead Ceramic Quad Flatpack, deep side-braze
Standard Microcircuit Drawing
- UT8SDMQ64M40: 5962-10229
- UT8SDMQ64M48: 5962-10230
- QML Q and Q+
INTRODUCTION
The UT8SDMQ64M40 and UT8SDMQ64M48 are high
performance, highly integrated Synchronous Dynamic Random
Access Memory (SDRAM) multi-chip modules (MCMs). Total
module density is 2,684,354,560 bits for the 2.5G device and
3,221,225,472 bits for the 3G device. Each bit bank is organized
as 8192 rows by 2048 columns.
Read and write accesses to the DRAM are burst oriented;
accesses start at a selected location and continue for a
programmed number of locations in a programmed sequence.
The programmable READ and WRITE burst lengths (BL) are
1, 2, 4, or 8 locations, or the full page, with a burst terminate
option.
Aeroflex’s SDRAMs are designed to operate at 3.3V. An auto-
refresh mode is provided, along with a power-saving, power-
down mode. All inputs and outputs are LVTTL compatible.
SDRAMs offer significant advances in DRAM operating
execution, including the capability to synchronously burst data
at a high data rate with automatic column-address generation,
to interleave between internal banks to mask precharging time,
and to randomly change column addresses on each clock cycle
during a burst access.
40
DQM5
48
U5
U4
U3
U2
8
8
8
DQM4
DQM3
DQM2
DQM1
DQM0
A[12:0]
BA[1:0]
CLK
CKE
RAS#
CAS#
WE#
CS#
15
U4
U3
U2
U1
8
8
DQM4
8
DQ[7:0](5)
DQ[7:0](4)
DQ[7:0](3)
8
DQ[47:40]
DQ[39:32]
DQ[31:24]
DQ[23:16]
DQ[15:8]
DQ[7:0]
DQ[7:0](4)
DQ[7:0](3)
8
DQ[39:32]
DQ[31:24]
DQ[23:16]
DQ[15:8]
DQ[7:0]
DQM3
DQM2
DQM1
DQM0
A[12:0]
BA[1:0]
CLK
CKE
RAS#
CAS#
WE#
CS#
15
DQ[7:0](2)
DQ[7:0](1)
8
U1
U0
SDRAM
16Meg x 8 x4
8
DQ[7:0](2)
8
DQ[7:0](1)
DQ[7:0](0)
U0
SDRAM
16Meg x 8 x4
DQ[7:0](0)
2.5Gigabit (64Mx40)
3.0Gigabit (64Mx48)
Figure 1. Block Diagrams
1
[STM32WB55 Review] BLE_p2pServer Project Extraction & Compilation
CubeWB provides a lot of examples that can be used directly in the software development environment. It supports three IDEs - IAR EWARM, MDK-ARM and SW4STM32. The latter uses the GCC compiler. I don't...
cruelfox RF/Wirelessly
The role of field effect tube
[size=4]The role of field effect tube: field effect tube is a unipolar transistor because most carriers participate in the conduction. It is also a voltage-controlled semiconductor device. It has the ...
fish001 Analogue and Mixed Signal
DA14580DEVKT -----------The trial board is in hand!
I just got it, so here are some photos:Plug in the USB cable, and it prompts J-LINK connection. It uses ATmel's SAM3U2C chip. There is not much information about DA14580DEVKT, so I hope everyone can s...
dontium RF/Wirelessly
70 IC packaging terms
1. BGA (ball grid array) is a spherical contact array, one of the surface mount packages. Spherical bumps are made on the back of the printed circuit board in an array to replace the pins, and the LSI...
ruopu PCB Design
The "fake" EEPROM inside the STC microcontroller stores long data, which must be erased before it can be written.
I was fooled by this fake EEPROM for a while. I thought erasing the whole sector was too bad at first, so I didn't write an erase function. Because I wanted to store 32-bit numbers in the EEPROM at fi...
huangweichi123 51mcu
ST's latest sensor driver
It is really difficult to use GitHub after it was acquired. Previously, the sensor drivers in STMems StandardC drivers were in one project, and they could be directly packaged and downloaded on the In...
littleshrimp MEMS sensors

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2542  1689  406  204  1316  52  34  9  5  27 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号