TC74LVX86FN datasheet, PDF - EEWORLD Datasheet

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TC74LVX86FN: DescriptionQUAD EXCLUSIVE OR GATE; Categorylogic logic; File Size234KB，8 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/; Environmental Compliance

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TC74LVX86FN Overview

QUAD EXCLUSIVE OR GATE

TC74LVX86FN Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Toshiba Semiconductor
Parts packaging code	SOIC
package instruction	SOP, SOP14,.25
Contacts	14
Reach Compliance Code	unknow
Other features	NOT AVAILABLE IN JAPAN
series	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14
length	8.65 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	XOR GATE
MaximumI(ol)	0.004 A
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP14,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Prop。Delay @ Nom-Su	14.5 ns
propagation delay (tpd)	21 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	2.7 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm

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TC74LVX86FN Related Products

	TC74LVX86FN	TC74LVX86FT	TC74LVX86F
Description	QUAD EXCLUSIVE OR GATE	QUAD EXCLUSIVE OR GATE	QUAD EXCLUSIVE OR GATE
Is it Rohs certified?	conform to	conform to	incompatible
Parts packaging code	SOIC	TSSOP	SOIC
package instruction	SOP, SOP14,.25	TSSOP, TSSOP14,.25	0.300 INCH, 1.27 MM PITCH, LEAD FREE, PLASTIC, SOP-14
Contacts	14	14	14
Reach Compliance Code	unknow	unknow	unknow
series	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
length	8.65 mm	5 mm	10.3 mm
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	XOR GATE	XOR GATE	XOR GATE
MaximumI(ol)	0.004 A	0.004 A	0.004 A
Number of functions	4	4	4
Number of entries	2	2	2
Number of terminals	14	14	14
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	TSSOP	SOP
Encapsulate equivalent code	SOP14,.25	TSSOP14,.25	SOP14,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Su	14.5 ns	14.5 ns	14.5 ns
propagation delay (tpd)	21 ns	21 ns	21 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	NO	NO
Maximum seat height	1.75 mm	1.2 mm	1.9 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	2 V	2 V	2 V
Nominal supply voltage (Vsup)	2.7 V	2.7 V	2.7 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	0.65 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	3.9 mm	4.4 mm	5.3 mm
Maker	Toshiba Semiconductor	-	Toshiba Semiconductor
Is it lead-free?	-	Lead free	Lead free
JESD-609 code	-	e4	e0
Terminal surface	-	Nickel/Palladium/Gold (Ni/Pd/Au)	Tin/Lead (Sn/Pb)

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