Multimedia ICs
75Ω driver with Y / C MIX circuit
BA7664FV
The BA7664FV is a 75Ω driver with a 6dB amplifier and a Y / C MIX circuit. The 75Ω driver is capable of driving a
load sufficient for two circuits, as well as being equipped with a sag correction function which reduces the capaci-
tance of the output coupling capacitor. The IC comes in the compact 8-pin SSOP-B package. The composite Y sig-
nal input pin is sync chip clamped input, while the chrominance input pin is bias input. An internal power-saving cir-
cuit is also included which provides an output muting function and output pin shorting protection.
•
Applications electronic cameras and others
Video cameras,
•
Features 8-pin SSOP-B package is used.
1) The compact
2)
3)
4)
5)
Operates at a low power consumption (60mW Typ.).
Internal Y / C MIX circuit.
Internal output muting circuit.
Internal power-saving circuit.
6) Internal output protection circuit.
7) Internal sag correction function makes it possible to
reduce the capacitance of the output coupling
capacitor.
8) A load sufficient for two circuits can be driven.
•
Absolute maximum ratings (Ta = 25°C)
Parameter
Power supply voltage
Power dissipation
Operating temperature
Storage temperature
Symbol
V
CC
Pd
T
opr
T
stg
Limits
8
350
– 25 ~ + 75
– 55 ~ + 125
Unit
V
mW
°C
°C
∗
Reduced by 3.5mW for each increase in Ta of 1°C over 25°C
•
Recommended operating conditions (Ta = 25°C)
Parameter
Operating power supply voltage
Symbol
V
CC
Min.
4.5
Typ.
5.0
Max.
5.5
Unit
V
∗
Not designed for radiation resistance.
1
Multimedia ICs
BA7664FV
•
Block diagram
MUTE
MUTEA
1
8
V
CC
Y
IN
2
+
6dB
75Ω
7
OUT1
GND
3
6
OUT2
20k
CHROMA MUTE
C
IN
4
5
MUTEB
2
Multimedia ICs
BA7664FV
•
Pin descriptions and input / output circuits
Pin. No
Pin name
IN
OUT
Reference
potential
Equivalent circuit
Pin description
Muting control
1
5
MUTEA
MUTEB
K
—
—
15k
14k
If MUTEA (pin 1) is set to HIGH, the
output is muted. If MUTEB (pin 8) is
set to HIGH, only the chrominance
signal is muted. (The Y signal is
output without being muted.)
Signal input
2
Y
IN
K
—
2.0V
This is the input pin for composite Y
signals, and is sync chip clamped
input.
↓
Ground
3
GND
—
—
0V
GND
Signal input
4
C
IN
K
—
2.0V
20k
↓
This is the input pin for chrominance
signals, and is bias-type input. The
input impedance is 20kΩ.
Signal output
6pin
6
7
MIXOUT2
MIXOUT1
—
K
0.9V
0.95V
7pin
These are the Y / C MIX signal output.
Pin 6 is the pin for sag correction. If
pin 7 is set to 0.2V or less, the
protective circuit is triggered and the
power-saving mode is accessed.
Power supply
V
CC
8
V
CC
—
—
5.0V
3
Multimedia ICs
BA7664FV
CC
•
Electrical characteristics (unless otherwise noted, Ta = 25°C, V
Parameter
Circuit current
Max. output level
Voltage gain
Frequency characteristic
Muting attenuation
Muting switching high level
Muting switching low level
Input impedance
Circuit current when muted
Symbol
I
CC
V
om
G
V
G
F
M
T
V
THH
V
THL
Z
IN
I
MUTE
Min.
6.1
2.6
– 1.0
– 1.5
—
2.2
0
16
—
Typ.
12.2
3.0
– 0.2
– 0.5
– 60
—
—
20
1.3
= 5V)
Max.
18.3
—
0.6
0.5
—
V
CC
0.7
24
2.6
Unit
mA
V
P-P
dB
dB
dB
V
V
kΩ
mA
Conditions
With no signal
f = 1kHz,THD = 1%V
02
f = 4.43MHz / V
01
f = 7MHz / 1MHz,1V
P-P
/ V
01
f = 4.43MHz,1V
P-P
/ V
01
—
—
Chrominance input pin (pin 7)
MUTEA “H”
•
Guaranteed design parameters (unless otherwise noted, Ta = 25°C, V
Parameter
Differential gain
Differential phase
Symbol
DG
DP
Min.
—
—
Typ.
1.0
0.5
Max.
2.0
2.0
Unit
%
DEG
CC
= 5V)
Conditions
V
IN
= 1.0V
P-P
reference staircase signal
V
IN
= 1.0V
P-P
reference staircase signal
•
Mute switch mode settings
• MUTEA (1pin)
H
L
MUTE
NORMAL
• MUTEB (5pin)
H
L
CHROMA MUTE
NORMAL
4
Multimedia ICs
BA7664FV
•
Measurement circuit
2.1V
1
2 SW1
3
1µF
1µF
2
SW2
2
+
MUTE
1
8
SW16
1
2
A
+
0.8V
47µ
0.1µ
1
100µ
+
6dB
75Ω
7
+
75
V
02
V
01
2.5V
3
6
+
0.1µF
1
0.1µF
2
3
V
SW4
4
20k
CHROMA MUTE
5
SW5
1
2
3
•
Measurement conditions
Parameter
Circuit current
Max. output level
Voltage gain
Y→OUT
C→OUT
Frequency characteristic
Muting attenuation
Chroma muting attenuation
Input impedance
Circuit current when muted
Symbol
1
I
CC
V
OM
G
V1
G
V2
G
F
M
T
M
TC
Z
IN
I
MUTE
2
3
3
3
3
1
3
3
1
2
1
2
2
3
1
2
3
1
1
SW Conditions
4
1
1
1
2
2
1
2
3
1
5
2
3
3
3
3
3
1
3
2
8
1
2
2
2
2
2
2
2
1
Measurement
method
∗
The muting switching level is substituted by carrying out the above measurement at H = 2.1V, L = 0.8V.
Measurement method
∗
1 Measure the circuit current when no signal is present.
∗
2 Apply a sine wave of f = 1kHz to the input, and adjust the input level so that the output distortion is 1%.
At this time, set the output voltage to the maximum output level of V
OM
[V
P-P
].
∗
3 Measure the output V
O
[V
P-P
] with a sine wave of f = 4.43MHz, 1V
P-P
applied to the input.
Voltage gain G
V
is: G
V
= 20 Log (V
O
/ V
IN
) [dB]
∗
4 Measure the outputs V
O7
and V
O1
[V
P-P
] each with sine waves of f = 7MHz, 1V
P-P
and f = 1MHz, 1V
P-P
applied to the input.
Voltage frequency G
F
is: G
F
= 20 Log (V
O7
/ V
O1
) [dB]
∗
5 Measure the output V
O
[V
P-P
] with a sine wave of f = 4.43MHz, 1V
P-P
applied to the input.
The muting attenuation M
T
is: M
T
= 20 Log (V
O
/ V
IN
) [dB]
∗
6 Measure the input voltage V
INSO
[V] and the open voltage of the input V
INO
[V] when 50µA is introduced.
The input impedance Z
IN
is: Z
IN
= |V
INSO
– V
INO
| / 50
×
1000 [kΩ]
∗
7 Measure the circuit current when MUTEA (pin 1) is HIGH.
+
150
3
22µ
75
2.1V
0.8V
Fig.1
∗
1
∗
2
∗
3
∗
3
∗
4
∗
5
∗
5
∗
6
∗
7
5
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