STI94000-70THO datasheet, PDF - EEWORLD Datasheet

STI94000-70THO: DescriptionFast Page DRAM Module, 4MX9, 70ns, CMOS, SIMM-30; Categorystorage storage; File Size198KB，6 Pages; ManufacturerSimple Tech Inc.

Download Datasheet Parametric View All

STI94000-70THO Overview

Fast Page DRAM Module, 4MX9, 70ns, CMOS, SIMM-30

Parameter Name	Attribute value
Maker	Simple Tech Inc.
package instruction	SIMM-30
Reach Compliance Code	unknow
access mode	FAST PAGE
Maximum access time	70 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
JESD-30 code	R-XSMA-N30
memory density	37748736 bi
Memory IC Type	FAST PAGE DRAM MODULE
memory width	9
Number of functions	1
Number of ports	1
Number of terminals	30
word count	4194304 words
character code	4000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4MX9
Output characteristics	3-STATE
Package body material	UNSPECIFIED
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified
refresh cycle	1024
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal location	SINGLE

IC Packaging Terminology Explained: IC Packaging Terminology Explained...; feifei PCB Design

[FPGA Problem Discussion] Multiple serial ports input data to FPGA, parsing is unstable: At present, the FPGA program parses and processes the signals of multiple external serial ports. At present, there is a problem that the parsed data always has random errors on the port. Normally, we ...; eeleader FPGA/CPLD

About the address problem of PievectTablelnit: I would like to ask you, why is there a statement for(i=0; i128; i++) *Dest++ = *Source++; in the following program? What is its function? void InitPieVectTable(void) { int16 i; Uint32 *Source = (void...; qlb Microcontroller MCU

CC (code composer) c5x/c20x software TMS320BC51PQ57 chip: I heard from a friend that CC (code composer) supports c5x/c20x. The CC software supports debugging TMS320BC51PQ57 chip. Which one has this version of software? In addition, does TMS320BC51PQ57 suppor...; lflanjian Wireless Connectivity

How can I convert the generated BSP into a downloadable format and then download it to the target board?: How to convert the generated bsp into a downloadable format and then download it to the target board? ppc860+vxworks5.4+tornado2.0 Can you tell me the detailed process? Thank you!...; anan Real-time operating system RTOS

【Altera SoC Experience Tour】+ How to say goodbye properly: I was planning to drive a camera module, but I couldn't debug it successfully after a long time. The OV9655 module was left over from the Qingke event. The event was about to end, so I planned to work...; 908508455a FPGA/CPLD

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components