X9438WS24 datasheet, PDF - EEWORLD Datasheet

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X9438WS24: DescriptionDigital Potentiometer, 2 Func, CMOS, PDSO24, PLASTIC, SOIC-24; CategoryAnalog mixed-signal IC converter; File Size112KB，18 Pages; ManufacturerXicor Inc.

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X9438WS24 Overview

Digital Potentiometer, 2 Func, CMOS, PDSO24, PLASTIC, SOIC-24

X9438WS24 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Xicor Inc.
package instruction	SOP,
Reach Compliance Code	unknow
Converter type	DIGITAL POTENTIOMETER
JESD-30 code	R-PDSO-G24
JESD-609 code	e0
length	15.4 mm
Nominal negative supply voltage	-3 V
Number of functions	2
Number of terminals	24
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Certification status	Not Qualified
Maximum seat height	2.65 mm
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	7.5 mm

X9438WS24 Preview

Preliminary Information

Programmable Analog

X9438

DESCRIPTION

The X9438 is a monolithic CMOS IC that incorporates

two operational ampliﬁers and two nonvolatile digitally

controlled potentiometers. The ampliﬁers are CMOS

differential input voltage operational ampliﬁers with

near rail-to-rail outputs. All pins for the two ampliﬁers

are brought out of the package to allow combining

them with the potentiometers, or using them as com-

plete stand-alone ampliﬁers.

The digitally controlled potentiometers consist of a

series string of 63 polycrystalline resistors that behave

as standard integrated circuit resistors. The two-wire

serial port, common to both pots, allows the user to

program the connection of the wiper output to any of

the resistor nodes in the series string. The wiper posi-

tion is saved in the on board E2 memory to allow for

nonvolatile restoration of the wiper position.

A wide variety of applications can be implemented

using the potentiometers and the ampliﬁers. A typical

application is to implement the ampliﬁer as a wiper

buffer in circuits that use the potentiometer as a voltage

reference. The potentiometer can also be combined

with the ampliﬁer yielding a digitally programmable gain

ampliﬁer or programmable current source.

Dual Digitally Controlled Potentiometer (XDCP

™

) with Operational Ampliﬁer

FEATURES

•

Two CMOS voltage operational ampliﬁers

Two digitally controlled potentiometers

Can be combined or used separately

Ampliﬁers:

—Low voltage operation

—V+/V- = ±2.7V to ±5.5V

—Rail-to-rail CMOS performance

—1MHz gain bandwidth product

• Digitally controlled potentiometers

—Dual 64 tap potentiometers

—R

total

= 10k

Ω

—2-wire serial interface

—V

= 2.7V to 5.5V

BLOCK DIAGRAM

V+

NI0

SCL

SDA

Control and

Memory

WCR0

–

OUT0

INV0

NI1

WCR1

–

OUT1

INV1

V–

REV 1.0 6/21/00

www.xicor.com

Characteristics subject to change without notice.

1 of 18

X9438 – Preliminary Information

PIN DESCRIPTIONS

Host Interface Pins

Serial Clock (SCL)

The SCL input is used to clock data into and out of the

X9438.

Serial Data (SDA)

SDA is a bidirectional pin used to transfer data into and

out of the device. It is an open drain output and may be

wire-ORed with any number of open drain or open col-

lector outputs. An open drain output requires the use of

a pull-up resistor.

Device Address (A

–A

)

The address inputs are used to set the least signiﬁcant

4 bits of the 8-bit slave address. A match in the slave

address serial data stream must be made with the

address input in order to initiate communication with

the X9438. A maximum of 16 devices may share the

same 2-wire serial bus.

Potentiometer Pins

(1)

–R

), R

–R

)

The R

and R

inputs are equivalent to the terminal

connections on either end of a mechanical potentiometer.

–R

)

The wiper output is equivalent to the wiper output of a

mechanical potentiometer.

Amplifier and Device Pins

Amplifier Input Voltage V

(0,1) and V

INV

(0,1)

and V

INV

are inputs to the noninverting (+) and

inverting (-) inputs of the operational ampliﬁers.

Amplifier Output Voltage V

OUT

(0,1)

OUT

is the voltage output pin of the operational ampliﬁer.

Hardware Write Protect Input WP

The WP pin, when low, prevents non-volatile writes to

the wiper counter registers.

Note:

(1) Alternate designations for R

, R

are V

, V

Analog Supplies V+, V-

The analog supplies V+, V- are the supply voltages for

the XDCP analog section and the operational ampliﬁers.

System Supply V

and Ground V

The system supply V

and its reference V

is used

to bias the interface and control circuits.

PIN CONFIGURATION

SOIC

SDA

V+

TSSOP

SCL

INV1

NI1

OUT1

V-

SDA

OUT0

NI0

INV0

NI0

INV0

X9438

SCL

INV1

NI1

OUT0

V+

X9438

OUT1

V-

PIN NAMES

Symbol

SCL

SDA

A0-A3

–R

NI(0,1)

INV(0,1)

OUT0,

OUT1

V+,V-

Serial Data

Device Address

Potentiometers (terminal equivalent)

Potentiometers (wiper equivalent)

Amplifier Input Voltages

Amplifier Outputs

Hardware Write Protection

Analog and Voltage Amplifier Supplies

System/Digital Supply Voltage

System Ground

No Connection

Description

Serial Clock

REV 1.0 6/21/00

www.xicor.com

Characteristics subject to change without notice.

2 of 18

X9438

– Preliminary Information

PRINCIPLES OF OPERATION

The X9438 is an integrated microcircuit incorporating

two resistor arrays, two operational ampliﬁers and their

associated registers and counters; and the serial inter-

face logic providing direct communication between the

host and the digitally controlled potentiometers and

operational ampliﬁers.

Serial Interface

The X9438 supports a bidirectional bus oriented proto-

col. The protocol deﬁnes any device that sends data

onto the bus as a transmitter and the receiving device

as the receiver. The device controlling the transfer is a

master and the device being controlled is the slave.

The master will always initiate data transfers and pro-

vide the clock for both transmit and receive operations.

Therefore, the X9438 will be considered a slave device

in all applications.

Clock and Data Conventions

Data states on the SDA line can change only during

SCL LOW periods (t

LOW

). SDA state changes during

SCL HIGH are reserved for indicating start and stop

conditions.

Start Condition

All commands to the X9438 are preceded by the start

condition, which is a HIGH to LOW transition of SDA

while SCL is HIGH (t

HIGH

). The X9438 continuously

monitors the SDA and SCL lines for the start condition

and will not respond to any command until this condi-

tion is met.

Stop Condition

All communications must be terminated by a stop con-

dition, which is a LOW to HIGH transition of SDA while

SCL is HIGH.

Acknowledge

Acknowledge is a software convention used to provide

a positive handshake between the master and slave

devices on the bus to indicate the successful receipt of

data. The transmitting device, either the master or the

slave, will release the SDA bus after transmitting eight

bits. The master generates a ninth clock cycle and dur-

ing this period the receiver pulls the SDA line LOW to

acknowledge that it successfully received the eight bits of

data.

The X9438 will respond with an acknowledge after rec-

ognition of a start condition and its slave address and

once again after successful receipt of the command

byte. If the command is followed by a data byte the

X9438 will respond with a ﬁnal acknowledge.

Operational Amplifier

The voltage operational ampliﬁers are CMOS rail-to-

rail output general purpose ampliﬁers. They are

designed to operate from dual (±) power supplies. The

ampliﬁers may be conﬁgured like any standard ampli-

ﬁer. All pins are externally available to allow connec-

tions with the potentiometers or as stand alone

ampliﬁers.

Potentiometer/Array Description

The X9438 is comprised of two resistor arrays and two

operational ampliﬁers. Each array contains 63 discrete

resistive segments that are connected in series. The

physical ends of each array are equivalent to the ﬁxed

terminals of a mechanical potentiometer (R

and R

inputs).

At both ends of each array and between each resistor

segment is a CMOS switch connected to the wiper

) output. Within each individual array only one

switch may be turned on at a time. These switches are

controlled by a volatile wiper counter register (WCR).

The six bits of the WCR are decoded to select, and

enable, one of sixty-four switches.

The WCR may be written directly, or it can be changed

by transferring the contents of one of four associated

data registers into the WCR. These data registers and

the WCR can be read and written by the host system.

INSTRUCTIONS AND PROGRAMMING

Device Addressing

Following a start condition the master must output the

address of the slave it is accessing. The most signiﬁ-

cant four bits of the slave address are the device type

identiﬁer (refer to Figure 1). For the X9438 this is ﬁxed

as 0101[B].

Figure 1. Address/Identification Byte Format

Device Type

Identifier

Device Address

REV 1.0 6/21/00

www.xicor.com

Characteristics subject to change without notice.

3 of 18

X9438 – Preliminary Information

The next four bits of the slave address are the device

address. The physical device address is deﬁned by the

state of the A

–A

inputs. The X9438 compares the

serial data stream with the address input state; a suc-

cessful compare of all four address bits is required for

the X9438 to respond with an acknowledge. The A

–

inputs can be actively driven by CMOS input signals

or tied to V

or V

Acknowledge Polling

The disabling of the inputs, during the internal non-vol-

atile write operation, can be used to take advantage of

the typical 5ms EEPROM write cycle time. Once the

stop condition is issued to indicate the end of the non-

volatile write command the X9438 initiates the internal

write cycle. ACK polling (Flow 1) can be initiated imme-

diately. This involves issuing the start condition fol-

lowed by the device slave address. If the X9438 is still

busy with the write operation no ACK will be returned.

If the X9438 has completed the write operation an ACK

will be returned and the master can then proceed with

the next operation.

Flow 1. ACK Polling Sequence

Nonvolatile Write

Command Completed

Enter Ack Polling

Issue

START

Issue Slave

Address

ACK

Returned?

Yes

Further

Operation?

Yes

Issue

Instruction

Issue STOP

Instruction Structure

The byte following the address contains the instruction

and register pointer information. The four most signiﬁ-

cant bits are the instruction. The next four bits point to

one of the two pots and when applicable they point to

one of the four WCRs associated data registers. The

format is shown below in Figure 2.

Figure 2. Instruction Byte Format

Select

Instructions

WCR Select

The four high order bits deﬁne the instruction. The next

two bits (R1 and R0) select one of the two registers

that is to be acted upon when a register oriented

instruction is issued. The last bit (P0) selects which

one of the two potentiometers is to be affected by the

instruction.

Four of the nine instructions end with the transmission

of the instruction byte. The basic sequence is illus-

trated in Figure 3. These two-byte instructions

exchange data between the wiper counter register and

one of the data registers. A transfer from a data regis-

ter to a wiper counter register is essentially a write to a

static RAM. The response of the wiper to this action will

be delayed t

WRL

. A transfer from the wiper counter reg-

ister (current wiper position) to a data register is a write

to non-volatile memory and takes a minimum of t

complete. The transfer can occur between one of the

two potentiometers and one of its associated registers;

or it may occur globally, wherein the transfer occurs

between all of the potentiometers and one of their

associated registers.

Four instructions require a three-byte sequence to

complete. The basic sequence is illustrated in Figure 4.

These instructions transfer data between the host and

the X9438; either between the host and one of the data

registers or directly between the host and the wiper

counter and analog control registers. These instruc-

tions are: 1) Read Wiper Counter Register or read the

current wiper position of the selected pot, 2) Write

Wiper Counter Register, i.e. change current wiper posi-

tion of the selected pot; 3) Read Data Register, read the

contents of the selected non-volatile register; 4) Write

Data Register, write a new value to the selected data

in Figure 6.

Issue STOP

Prooceed

REV 1.0 6/21/00

www.xicor.com

Characteristics subject to change without notice.

4 of 18

X9438

– Preliminary Information

Figure 3. Two-Byte Command Sequence

SCL

SDA

R1 R0 0

Figure 4. Three-Byte Command Sequence

SCL

SDA

A3 A2 A1 A0 A

I1 I0

P0 R1 R0 A

D5 D4 D3 D2 D1 D0

The Increment/Decrement command is different from

the other commands. Once the command is issued

and the X9438 has responded with an acknowledge,

the master can clock the selected wiper up and/or

down in one segment steps; thereby, providing a ﬁne

tuning capability to the host. For each SCL clock pulse

HIGH

) while SDA is HIGH, the selected wiper will

move one resistor segment towards the V

terminal.

Similarly, for each SCL clock pulse while SDA is LOW,

the selected wiper will move one resistor segment

towards the V

terminal. A detailed illustration of the

sequence for this operation is shown in Figure 5.

Figure 5. Increment/Decrement Command Sequence

SCL

SDA

A3 A2 A1 A0

P1 P0 R1 R0 A

REV 1.0 6/21/00

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Characteristics subject to change without notice.

5 of 18

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	X9438WS24	X9438WP24	X9438WP24I	X9438YS24	X9438YP24	X9438WV24I
Description	Digital Potentiometer, 2 Func, CMOS, PDSO24, PLASTIC, SOIC-24	Digital Potentiometer, 2 Func, CMOS, PDIP24, PLASTIC, DIP-24	Digital Potentiometer, 2 Func, CMOS, PDIP24, PLASTIC, DIP-24	Digital Potentiometer, 2 Func, CMOS, PDSO24, PLASTIC, SOIC-24	Digital Potentiometer, 2 Func, CMOS, PDIP24, PLASTIC, DIP-24	Digital Potentiometer, 2 Func, CMOS, PDSO24, PLASTIC, TSSOP-24
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Xicor Inc.	Xicor Inc.	Xicor Inc.	Xicor Inc.	Xicor Inc.	Xicor Inc.
package instruction	SOP,	PLASTIC, DIP-24	PLASTIC, DIP-24	SOP,	DIP,	TSSOP,
Reach Compliance Code	unknow	unknown	unknown	unknown	unknown	unknow
Converter type	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER
JESD-30 code	R-PDSO-G24	R-PDIP-T24	R-PDIP-T24	R-PDSO-G24	R-PDIP-T24	R-PDSO-G24
JESD-609 code	e0	e0	e0	e0	e0	e0
length	15.4 mm	31.685 mm	31.685 mm	15.4 mm	31.685 mm	7.8 mm
Number of functions	2	2	2	2	2	2
Number of terminals	24	24	24	24	24	24
Maximum operating temperature	70 °C	70 °C	85 °C	70 °C	70 °C	85 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	DIP	DIP	SOP	DIP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	IN-LINE	IN-LINE	SMALL OUTLINE	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.65 mm	4.87 mm	4.87 mm	2.65 mm	4.87 mm	1.2 mm
surface mount	YES	NO	NO	YES	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	THROUGH-HOLE	THROUGH-HOLE	GULL WING	THROUGH-HOLE	GULL WING
Terminal pitch	1.27 mm	2.54 mm	2.54 mm	1.27 mm	2.54 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	7.5 mm	15.24 mm	15.24 mm	7.5 mm	15.24 mm	4.4 mm

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