Tantalum Chip Capacitors
Low Profile, Low ESR
Ordering code:
Date:
B45192R1227+40*
July 2006
© EPCOS AG 2006. Reproduction, publication and dissemination of this publication, enclosures hereto and the
information contained therein without EPCOS' prior express consent is prohibited.
Tantalum chip capacitors
Low Profile, Low ESR
Preliminary Data
Features
High volumetric efficiency
Reduced height
Excellent solderability
Stable temperature and frequency
characteristics
Low leakage current, low dissipation factor
Low self-inductance
High resistance to shock and vibration
Suitable for use without series resistor
(recommended operating conditions see
www.epcos.com/tantalum_gti, section 4.4)
Lead-free and material content compatible
with RoHS
Technical data and ordering code
Ordering code
Rated capacitance
Rated voltage
Operating temperature range
Maximum leakage current
Maximum dissipation factor
Maximum equivalent series
resistance
Maximum ripple current
Case size
EIA code
Dimensions
(L x W x H)
(20
°C,
120 Hz)
(20
°C,
100 kHz)
(20
°C,
100 kHz)
(tinned terminals)
(20
°C,
120 Hz)
(up to 85
°C)
(up to 125
°C)
C
R
V
R
T
op
(20
°C,
V
R
, 5 min) I
leak,max
DF
max
8
B45192R1227+40*
220
6.3
4
55 ... +125
13.9
B45192R1227+40*
µF
VDC
°C
µA
%
mΩ
A
ESR
max
250
I
AC,max
0.66
X
7343-15
Failure rate
(1 fit = 1 10
-9
failures/h)
*=
(at 40
°C; ≤
V
R
,
R
S
≤
0.1
Ω/V)
7.3
±0.3
x 4.3
±0.3
x 1.5 max
mm
(0.287
±0.012
x 0.169
±0.012
x (inch)
0.059 max)
≤288
fit
+ = Capacitance tolerance
M =
±20%
K =
±10%
Code number for reel diameter
6 = 330-mm reel
9 = 180-mm reel
Please read
Important notes
and
Cautions and warnings
at the end of this document.
Page 2 of 6
Tantalum chip capacitors
Low Profile, Low ESR
Preliminary Data
Ordering code structure
B45
Tantalum
capacitor
B45192R1227+40*
194R
1
337
+
40
*
Series
190E = Low Profile, H
max
= 1.2 mm,
Standard ESR, tinned terminals
192E = Low Profile, H
max
= 1.5 mm,
Standard ESR, tinned terminals
194E = Low Profile, H
max
= 2.0 mm,
Standard ESR, tinned terminals
190R = Low Profile, H
max
= 1.2 mm,
Low ESR, tinned terminals
192R = Low Profile, H
max
= 1.5 mm,
Low ESR, tinned terminals
194R = Low Profile, H
max
= 2.0 mm,
Low ESR, tinned terminals
Rated voltage
0 = 4 V, 1 = 6.3 V, 2 = 10 V, 3 = 16 V, 4 = 20 V,
5 = 25 V, 6 = 35 V
Rated capacitance + exponent
C [pF] 10
x
E.g.: 686 = 68 pF 10
6
= 68
µF,
157 = 15 pF
10
7
= 150
µF
Capacitance tolerance
M =
±20%,
K =
±10%
Case size
20 = R
30 = W, U
40 = X, V
Reel diameter
9 = 180 mm, 6 = 330 mm
Please read
Important notes
and
Cautions and warnings
at the end of this document.
Page 3 of 6
Tantalum chip capacitors
Low Profile, Low ESR
Preliminary Data
Cautions and warnings
B45192R1227+40*
When using tantalum capacitors with a manganese dioxide coating, the following cautions and
warnings should be taken into account:
Polarity
Because tantalum capacitors are
polar capacitors,
it is important to observe their polarity
markings (positive pole on the anode, negative pole on the cathode). Any incorrect polarity
resulting from the sum of the AC and DC voltage components must be smaller than or equal to
the permitted
polarity reversal voltage
(see “General technical information”, section 4.6 and
section 4.8 under www.epcos.com/tantalum_capacitors). To avoid reducing their reliability, this
voltage may only occur for a short time, at most five times for a duration of one minute per hour.
Voltage
The
maximum continuous voltage
depends on the ambient temperature. Within the temperature
range of 55 to +85
°C,
the rated voltage is equal to the maximum continuous voltage. Between
+ 85 and + 125
°C
the maximum continuous voltage must be reduced linearly from the full rated
voltage to 2/3 of it (derating). At 150
°C
(only B4519*P series) the voltage must be reduced to 1/2
and at 175
°C
(only B4519*T series) to 1/3 of the rated voltage. Operation below the maximum
continuous voltage has a positive effect on the capacitor’s failure rate. The maximum continuous
voltage must not be exceeded (see“Quality and environment”, section 1.11 under
www.epcos.com/tantalum_capacitors).
All unfavourable operating conditions (such as possible line overvoltages, unfavourable
tolerances of the transformation ratio of the line transformer in the equipment, repeated
overvoltages when the equipment is switched on, high ambient temperatures) must be taken into
account when determining the
operating voltage.
The
surge voltage
is the maximum voltage (peak value) that may be applied to the capacitor for
short periods, at most five times for a total duration of up to 1 minute per hour. The surge voltage
must not be applied for periodic charging and discharging in the course of normal operation and
cannot be part of the operating voltage. The permissible surge voltage for all capacitors in this
data book is 1.3 x the rated voltage. The occurrence of voltage impulses (transient voltages) that
exceed the surge voltage may lead to irreparable damage.
Capacitance
The actual
capacitance
of a capacitor can deviate from the rated capacitance by as much as the
full magnitude of the tolerance at delivery. The capacitance varies with the temperature (at
+125
°C
+12% up to +20%) and decreases with increasing frequency (see “General technical
information”, section 5 under www.epcos.com/tantalum_capacitors).
Please read
Important notes
and
Cautions and warnings
at the end of this document.
Page 4 of 6
Tantalum chip capacitors
Low Profile, Low ESR
Preliminary Data
B45192R1227+40*
Low-resistance applications and voltage networks
For
low-resistance applications,
EPCOS recommends a maximum operating voltage of half the
permissible maximum continuous voltage, so that the capacitors have sufficient tolerance to
withstand voltage peaks. Depending on the conditions of use, the early failure rate is higher here
by a factor of 2 to 20 than in the range with a constant failure rate as specified in the data book
(see“Quality and environment”, section 1.11 under www.epcos.com/tantalum_capacitors).
When operated directly in a
voltage network,
the capacitor should be protected against
overvoltage, e.g. by a suppressor diode, and against polarity reversal by a diode. If a capacitor is
operated in an unprotected low-impedance circuit and fails because the permissible conditions for
the forward DC voltage, reverse DC voltage, surge current, power dissipation or temperature are
exceeded, the continued current flow through the overstressed capacitor may produce
overheating. The overheated capacitor may damage the surrounding components and the circuit
board (see“Quality and environment”, section 1.11 and “General technical information”, section
4.11 under www.epcos.com/tantalum_capacitors).
Storage conditions
Capacitors with solid electrolyte may be stored at temperatures down to –80
°C.
The upper
storage temperature
must not exceed +85
°C
(for blister tape the temperature limit is +40
°C).
The storage conditions should not exceed +40
°C
and 70% R. H. A drypack is useful to prevent
the effects of humidity.
Note
For more detailed information about cautions and warnings for tantalum electrolytic capacitors
(e.g. other electrical values beside those listed above), see “General technical information” and
“Quality and environment” under www.epcos.com/tantalum_capacitors.
Please read
Important notes
and
Cautions and warnings
at the end of this document.
Page 5 of 6
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