EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 45°C/W,
θ
JC
= 10°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LT3684EDD
LT3684IDD
DD PART MARKING*
LCVT
LCVT
ORDER PART NUMBER
LT3684EMSE
LT3684IMSE
MSE PART MARKING*
LTCVS
LTCVS
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
PARAMETER
Minimum Input Voltage
Quiescent Current from V
IN
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 10V, V
RUNS/SS
= 10V, V
BOOST
= 15V, V
BIAS
= 3.3V unless otherwise
noted. (Note 2)
CONDITIONS
●
MIN
TYP
3
0.01
0.4
1.2
0.01
MAX
3.6
0.5
0.8
2.0
0.5
1.5
0.1
UNITS
V
µA
mA
mA
µA
mA
mA
V
RUN/SS
= 0.2V
V
BIAS
= 3V, Not Switching
V
BIAS
= 0, Not Switching
●
Quiescent Current from BIAS
V
RUN/SS
= 0.2V
V
BIAS
= 3V, Not Switching
V
BIAS
= 0, Not Switching
●
0.85
0
3684f
2
LT3684
ELECTRICAL CHARACTERISTICS
PARAMETER
Minimum Bias Voltage
Feedback Voltage
●
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 10V, V
RUNS/SS
= 10V V
BOOST
= 15V, V
BIAS
= 3.3V unless otherwise
noted. (Note 2)
CONDITIONS
MIN
1.25
1.24
TYP
2.7
1.265
1.265
30
0.002
330
1000
75
100
3.5
2
R
T
= 8.66k
R
T
= 29.4k
R
T
= 187k
●
MAX
3
1.28
1.29
100
0.02
UNITS
V
V
V
nA
%/V
µMho
µA
µA
A/V
V
FB Pin Bias Current (Note 3)
FB Voltage Line Regulation
Error Amp g
m
Error Amp Gain
V
C
Source Current
V
C
Sink Current
V
C
Pin to Switch Current Gain
V
C
Clamp Voltage
Switching Frequency
4V < V
IN
< 34V
●
2.7
1.25
250
3.1
3.0
1.4
300
100
3.6
360
0.02
3.3
1.55
350
150
4.0
2
2.1
30
10
0.2
MHz
MHz
kHz
nS
A
mV
µA
V
mA
µA
V
V
mV
mV
Minimum Switch Off-Time
Switch Current Limit
Switch V
CESAT
Boost Schottky Reverse Leakage
Minimum Boost Voltage (Note 4)
BOOST Pin Current
RUN/SS Pin Current
RUN/SS Input Voltage High
RUN/SS Input Voltage Low
PG Threshold Offset from Feedback Voltage
PG Hysteresis
PG Leakage
PG Sink Current
V
PG
= 5V
V
PG
= 0.4V
V
FB
Rising
I
SW
= 1A
V
RUN/SS
= 2.5V
Duty Cycle = 5%
I
SW
= 2A
V
SW
= 10V, V
BIAS
= 0V
●
1.6
18
5
2.5
100
10
0.1
1
µA
µA
●
100
300
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LT3684E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LT3684I specifications are
guaranteed over the –40°C to 125°C temperature range.
Note 3:
Bias current measured in regulation. Bias current flows into the FB
pin.
Note 4:
This is the minimum voltage across the boost capacitor needed to
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FPGA/CPLD
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