LF2246GC25 datasheet, PDF - EEWORLD Datasheet

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LF2246GC25: DescriptionDigital Filter, 10-Bit, CMOS, CPGA120, CERAMIC, PGA-120; CategoryThe embedded processor and controller Microcontrollers and processors; File Size611KB，7 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LF2246GC25 Overview

Digital Filter, 10-Bit, CMOS, CPGA120, CERAMIC, PGA-120

LF2246GC25 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	PGA
package instruction	PGA, PGA120,13X13
Contacts	120
Reach Compliance Code	unknow
ECCN code	3A991.A.2
Other features	4 X 10 BIT DATA INPUT AND 4 X 11 BIT COEFFICIENT INPUT BUSES; 25 BIT RESULT ACCUMULATOR
boundary scan	NO
maximum clock frequency	40 MHz
External data bus width	10
JESD-30 code	S-CPGA-P120
JESD-609 code	e0
length	33.4899 mm
low power mode	NO
Humidity sensitivity level	3
Number of terminals	120
Maximum operating temperature	70 °C
Minimum operating temperature
Output data bus width	16
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA120,13X13
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum seat height	4.4196 mm
Maximum slew rate	100 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	33.4899 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, DIGITAL FILTER

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LF2246GC25 Related Products

	LF2246GC25	LF2246GC15
Description	Digital Filter, 10-Bit, CMOS, CPGA120, CERAMIC, PGA-120	Digital Filter, 10-Bit, CMOS, CPGA120, CERAMIC, PGA-120
Is it Rohs certified?	incompatible	incompatible
Maker	LOGIC Devices	LOGIC Devices
Parts packaging code	PGA	PGA
package instruction	PGA, PGA120,13X13	PGA, PGA120,13X13
Contacts	120	120
Reach Compliance Code	unknow	unknown
ECCN code	3A991.A.2	3A001.A.3
Other features	4 X 10 BIT DATA INPUT AND 4 X 11 BIT COEFFICIENT INPUT BUSES; 25 BIT RESULT ACCUMULATOR	4 X 10 BIT DATA INPUT AND 4 X 11 BIT COEFFICIENT INPUT BUSES; 25 BIT RESULT ACCUMULATOR
boundary scan	NO	NO
maximum clock frequency	40 MHz	66.7 MHz
External data bus width	10	10
JESD-30 code	S-CPGA-P120	S-CPGA-P120
JESD-609 code	e0	e0
length	33.4899 mm	33.4899 mm
low power mode	NO	NO
Humidity sensitivity level	3	3
Number of terminals	120	120
Maximum operating temperature	70 °C	70 °C
Output data bus width	16	16
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA
Encapsulate equivalent code	PGA120,13X13	PGA120,13X13
Package shape	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY
Peak Reflow Temperature (Celsius)	225	225
power supply	5 V	5 V
Certification status	Not Qualified	Not Qualified
Maximum seat height	4.4196 mm	4.4196 mm
Maximum slew rate	100 mA	100 mA
Maximum supply voltage	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V
surface mount	NO	NO
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	33.4899 mm	33.4899 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, DIGITAL FILTER	DSP PERIPHERAL, DIGITAL FILTER

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