ZL10037
Digital Satellite Tuner
with RF Bypass
Data Sheet
Features
•
•
•
•
•
•
•
•
•
•
Direct conversion tuner for quadrature down
conversion from L-band to Zero IF
Symbol rate 1-45 MSps
High sensitivity <-83 dBm at 27.5 MSps
Independent RF AGC and baseband gain control
Fifth order baseband filters with bandwidth
adjustable from 6 to 43 MHz
Fully integrated alignment-free low phase noise
local oscillator
Selectable RF Bypass
I
2
C compatible control
3.3 Volt Supply
28 pin 5x5 mm QFN Package
Ordering Information
ZL10037LCG
ZL10037LCF
ZL10037LCG1
ZL10037LCF1
*Pb
28 Pin QFN Trays
28 Pin QFN Tape and Reel
28 Pin QFN* Trays
28 Pin QFN* Tape and Reel
Free Matte Tin
September 2005
-10°C to +85°C
Description
The ZL10037 is a fully integrated direct conversion
tuner for digital satellite receiver systems. It provides
excellent immunity to composite undesired channels.
The device also contains a RF Bypass for connecting
to a second receiver module.
The ZL10037 is simple to use, requiring no alignment
or tuning algorithms and uses a minimum number of
external components. The device is programmable via
a I
2
C compatible bus.
A complete reference design (ZLE10542) is available
using ZL10313 demodulator.
Applications
•
•
DVB-S Free-to-Air Satellite receiver systems
8PSK Satellite Receiver Systems
RF AGC
ZL10037
I
RF Input
Q
Bypass
Output
Quadrature
I
2
C
Control
VCO
PLL
Loop
Filter
Crystal
Figure 1 - Basic Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2005, Zarlink Semiconductor Inc. All Rights Reserved.
ZL10313
QPSK Demodulator
ZL10037
Table of Contents
Data Sheet
1.0 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.1 RF Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.2 Baseband . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.3 RF Bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.1 On Chip VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.2 PLL Frequency Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.0 Register Map and Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.0 Applications Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.0 Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.0 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.0 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.0 Typical Performance Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2
Zarlink Semiconductor Inc.
ZL10037
SLEEP
IOUT
VccBB
QOUT
QOUT
Data Sheet
SDA
P0
XCAP
XTAL
VccDIG
VccCP
PUMP
SCL
IOUT
RFAGC
N/C
RFIN
ZL10037
N/C
RFIN
N/C
1
PAD/REF
VccLO
RFBYPASS
VccVCO
Vvar
LOTEST
VccRF2
VccRF1
Ground - Package Paddle
Figure 2 - Pin Diagram
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Name
Vvar
PAD/REF
VccVCO
VccLO
LOTEST
VccRF2
VccRF1
N/C
RFIN
N/C
RFIN
N/C
RFAGC
Description
LO Tuning Voltage
Vvar Reference Ground
/ Continuity Test
VCO Supply
LO Supply
LO Test pin - do not connect
RF Supply
RF Supply
Not connected
RF Input
Not connected
RF Complementary Input
Not connected
RF Gain control input
Pin #
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Name
QOUT
QOUT
VccBB
IOUT
IOUT
SLEEP
SCL
SDA
P0
XCAP
XTAL
VccDIG
VccCP
PUMP
Description
Q Channel baseband output
Q Channel baseband output
Baseband Supply
I Channel baseband output
I Channel baseband output
Hardware power down input
I
2
C Clock
I
2
C Data
General purpose switching output
Crystal oscillator feedback
Crystal oscillator crystal input
Digital Supply
Varactor Tuning Supply
PLL charge pump output
RFBYPASS RF Bypass output
Table 1 - Pin Names
Note: Ground contact is via underside of package. Pin 2 is connected to ground internally.
3
Zarlink Semiconductor Inc.
ZL10037
Data Sheet
BF
BANDWIDTH
ADJUST
VccBB
QOUT
VccFE1
VccFE2
FILTER
QOUT
RFAGC
DC
CORRECTION
DC
CORRECTION
RFIN
RFIN
FILTER
10dB switched
gain (RFG)
RFBYPASS
IOUT
IOUT
90 deg
0 deg
PHASE
SPLITTER
VccLO
LOTEST
Vvar
PAD/REF
VccVCO
(PADDLE)
LOCK
DETECT
VCO
BANK
15 BIT
PROGRAMMABLE
DIVIDER
Fpd
CHARGE
PUMP
VccCP
PUMP
Fcomp
VccDIG
SDA
SCL
I2C BUS
INTERFACE
PORT
INTERFACE
P0
SLEEP
XTAL
XCAP
REF
OSC
REFERENCE DIVIDER
Figure 3 - Detailed Block Diagram
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Zarlink Semiconductor Inc.
ZL10037
1.0
1.1
Data Sheet
Circuit Description
Functional Description
The ZL10037 is a single chip wide band direct conversion tuner with integral RF bypass optimised for digital
satellite receiver systems. It provides excellent signal handling capability in the presence of high composite signal
levels.
The device offers a highly integrated solution for a satellite tuner incorporating a low phase noise PLL frequency
synthesizer, the quadrature down converter, a fully integrated local oscillator, and programmable baseband channel
filters. A minimal number of additional peripheral components are required. The crystal reference source can be
also used as the reference for the demodulator.
An I
2
C compatible bus interface controls all of the tuner functionality.
The ZL10037 contains both hardware and software power down modes.
1.2
1.2.1
Signal Path
RF Input
The tuner RF input signal at a frequency of 950 – 2150 MHz is fed to the ZL10037 RF input pre-amplifier stage.
The signal handling is designed such that no tracking filter is required to offer immunity to input signal composite
overload.
The RF input amplifier feeds an AGC stage, which provides RF gain control. There is additional gain adjustment in
the baseband section. The total AGC gain range will guarantee an operating dynamic range of –92 to –10 dBm.
The RF AGC in the ZL10037 is divided into two stages. The first stage is a continually variable gain control stage,
and provides the main system AGC set under control of the analogue AGC signal generated by the demodulator
section. The second stage is a programmable gain stage to reduce RF gain by 10 dB. This would normally be used
when an external LNA is being used to improve system sensitivity.
The analogue RF AGC is optimised for S/N and S/I performance across the full dynamic range. Typical RF AGC
characteristic and variation of IIP3, IIP2 and NF are shown in Section 8 - Typical Performance Curves.
The output of the AGC stage is coupled to the quadrature mixer where the RF signal is mixed with quadrature local
oscillator signals generated by the on-board local oscillator.
1.2.2
Baseband
The outputs of the quadrature down converter are passed through the baseband filters followed by a programmable
baseband gain stage.
The baseband paths are DC coupled. An integrated DC correction loop prevents saturation due to local oscillator
self-mixing in the converter section. No external components are required for dc correction.
The baseband filters are 5
th
order Chebychev and provide excellent matching in both amplitude and phase
between the I and Q channels. The filters are fully programmable for 3 dB bandwidths from 6 MHz to 43 MHz. The
recommended filter bandwidth is related to the required symbol rate by the following equation.
−
3
dBFilterBandwidth fc
=
SymbolRate
×
1.35
2
×
0.8
This equation makes no allowance for LNB tuning offset at low symbol rates < 10 MS/s.
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Zarlink Semiconductor Inc.