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3.3 V, ±15 kV ESD-Protected, Half- and
Full-Duplex, RS-485/RS-422 Transceivers
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
FEATURES
TIA/EIA RS-485/RS-422 compliant
±15 kV ESD protection on RS-485 input/output pins
Data rates
ADM3483E/ADM3488E: 250 kbps
ADM3486E: 2.5 Mbps
ADM3490E/ADM3491E: 12 Mbps
Half- and full-duplex options
Up to 32 nodes on the bus
Receiver open-circuit, fail-safe design
Low power shutdown current
(ADM3483E/ADM3486E/ADM3491E only)
Outputs high-Z when disabled or powered off
Common-mode input range: −7 V to +12 V
Thermal shutdown and short-circuit protection
Industry-standard 75176 pinout
8-lead and 14-lead narrow SOIC packages
FUNCTIONAL BLOCK DIAGRAMS
V
CC
ADM3483E/
ADM3486E
RO
RE
DE
DI
D
06284-001
R
A
B
GND
Figure 1.
V
CC
ADM3488E/
ADM3490E
RO
R
A
B
APPLICATIONS
Power/energy metering
Telecommunications
EMI-sensitive systems
Industrial control
Local area networks
DI
D
Z
Y
06284-002
GND
Figure 2.
V
CC
GENERAL DESCRIPTION
The ADM3483E/ADM3486E/ADM3488E/ADM3490E/
ADM3491E are 3.3 V, low power data transceivers with
±15 kV ESD protection suitable for full- and half-duplex
communication on multipoint bus transmission lines. They
are designed for balanced data transmission, and they
comply with TIA/EIA standards RS485 and RS-422. The
ADM3483E/ADM3486E are half-duplex transceivers that
share differential lines and have separate enable inputs for
the driver and receiver. The full-duplex ADM3488E/
ADM3490E/ADM3491E transceivers have dedicated
differential line driver outputs and receiver inputs. The
ADM3491E also features separate enable inputs for the
driver and receiver.
The devices have a 12 kΩ receiver input impedance,
which allows up to 32 transceivers on a bus. Because only
one driver should be enabled at any time, the output of a
disabled or powered-down driver is tristated to avoid
overloading the bus.
ADM3491E
RO
RE
DE
DI
D
Z
Y
06284-003
R
A
B
GND
Figure 3.
(continued on Page 3)
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 4
Driver Timing Specifications...................................................... 5
Receiver Timing Specifications .................................................. 6
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Test Circuits and Switching Characteristics.................................. 9
Typical Performance Characteristics ........................................... 11
Circuit Description......................................................................... 14
Devices with Receiver/Driver Enable—ADM3483E/
ADM3486E/ADM3491E ........................................................... 14
Devices Without Receiver/Driver Enable―ADM3488E/
ADM3490E ................................................................................. 14
Low Power Shutdown Mode—ADM3483E/ADM3486E /
ADM3491E ................................................................................. 14
Driver Output Protection.......................................................... 14
Propagation Delay ...................................................................... 14
Line Length vs. Data Rate ......................................................... 14
±15 kV ESD Protection ............................................................. 15
Human Body Model .................................................................. 15
Typical Applications................................................................... 15
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
REVISION HISTORY
10/06—Rev. 0 to Rev. A
Added ADM3483E and ADM3488E ...............................Universal
Changes to Figure 1 and Figure 2................................................... 1
Inserted Table 3................................................................................. 5
Changes to Figure 4 and Figure 5................................................... 8
Inserted Figure 28 and Figure 29.................................................. 13
Changes to Figure 31 and Figure 32............................................. 16
Changes to Figure 34...................................................................... 17
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
8/06—Revision 0: Initial Version
Rev. A | Page 2 of 20
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
GENERAL DESCRIPTION
(continued from Page 1)
The driver outputs of the ADM3483E/ADM3486E/
ADM3488E are slew rate limited, in order to reduce EMI
and data errors caused by reflections from improperly
terminated buses. The receiver has a fail-safe feature that
ensures a logic high output when the inputs are floating.
Table 1. Selection Table
Part No.
ADM3483E
ADM3486E
ADM3488E
ADM3490E
ADM3491E
Guaranteed Data
Rate (Mbps)
0.25
2.5
0.25
12
12
Supply
Voltage (V)
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
Half/Full
Duplex
Half
Half
Full
Full
Full
Slew Rate
Limited
Yes
Yes
Yes
No
No
Driver/Receiver
Enable
Yes
Yes
No
No
Yes
±15
kV ESD Protection
on Bus Pins
Yes
Yes
Yes
Yes
Yes
Pin Count
8
8
8
8
14
Excessive power dissipation caused by bus contention
or by output shorting is prevented with a thermal shut-
down circuit.
The parts are fully specified over the industrial temperature range
and are available in 8-lead and 14-lead narrow SOIC packages.
Rev. A | Page 3 of 20
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
SPECIFICATIONS
V
CC
= 3.3 V ± 0.3 V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2. ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
Parameter
DRIVER
Differential Outputs
Differential Output Voltage
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
V
OD
2.0
1.5
1.5
0.2
3
0.2
−250
250
Δ|V
OD
| for Complementary Output States
1
Common-Mode Output Voltage
Δ|V
OC
| for Complementary Output States
1
Short-Circuit Output Current
Output Leakage (Y, Z) (ADM3491E Only)
Normal Mode
∆V
OD
V
OC
∆V
OC
I
OSD
I
O
V
V
V
V
V
V
mA
mA
μA
μA
R
L
= 100 Ω (RS-422) (see Figure 7)
R
L
= 54 Ω (RS-485) (see Figure 7)
R
L
= 60 Ω (RS-485) (see Figure 8)
R
L
= 54 Ω or 100 Ω (see Figure 7)
R
L
= 54 Ω or 100 Ω (see Figure 7)
R
L
= 54 Ω or 100 Ω (see Figure 7)
V
OUT
= −7 V
V
OUT
= 12 V
DE = 0 V, RE = 0 V, V
CC
= 0 V or 3.6 V,
V
OUT
= 12 V
DE = 0 V, RE = 0 V, V
CC
= 0 V or 3.6 V,
V
OUT
= −7 V
DE = 0 V, RE = V
CC
, V
CC
= 0 V or 3.6 V,
V
OUT
= 12 V
DE = 0 V, RE = V
CC
, V
CC
= 0 V or 3.6 V,
V
OUT
= −7 V
DE, DI, RE
DE, DI, RE
DE, DI, RE
20
−20
Shutdown Mode
−1
Logic Inputs
Input High Voltage
Input Low Voltage
Logic Input Current
RECEIVER
Differential Inputs
Differential Input Threshold Voltage
Input Hysteresis
Input Resistance (A, B)
Input Current (A, B)
RO Logic Output
Output High Voltage
Output Low Voltage
Short-Circuit Output Current
Tristate Output Leakage Current
POWER SUPPLY
Voltage Range
Supply Current
1
μA
μA
V
IH
V
IL
I
IN1
2.0
0.8
±2
V
V
μA
V
TH
∆V
TH
R
IN
I
IN2
−0.2
50
12
0.2
1.0
−0.8
V
mV
kΩ
mA
mA
V
V
mA
μA
V
mA
mA
μA
kV
kV
−7 V < V
CM
< +12 V
V
CM
= 0 V
−7 V < V
CM
< +12 V
DE = 0 V, V
CC
= 0 V or 3.6 V, V
IN
= 12 V
DE = 0 V, V
CC
= 0 V or 3.6 V, V
IN
= −7 V
I
OUT
= −1.5 mA, V
ID
= 200 mV (see Figure 9)
I
OUT
= 2.5 mA, V
ID
= 200 mV (see Figure 9)
0 V < V
RO
< V
CC
V
CC
= 3.6 V, 0 V < V
OUT
< V
CC
V
OH
V
OL
I
OSR
I
OZR
V
CC
I
CC
V
CC
− 0.4
±8
0.4
±60
±1
3.6
2.2
1.9
1
3.0
1.1
0.95
Shutdown Current
ESD PROTECTION
A, B, Y, Z Pins
All Pins Except A, B, Y, Z Pins
1
I
SHDN
0.002
±15
±4
No load, DI = 0 V or V
CC
, DE = V
CC
,
RE = 0 V or V
CC
No load, DI = 0 V or V
CC
, DE = 0 V,
RE = 0 V
DE = 0 V, RE = V
CC
, DI = 0 V or V
CC
Human body model
Human body model
Δ|V
OD
| and Δ|V
OC
| are the changes in V
OD
and V
OC
, respectively, when DI input changes state.
Rev. A | Page 4 of 20
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