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DG534AAP/883

Description
4-CHANNEL, VIDEO MULTIPLEXER, PDIP20
CategoryAnalog mixed-signal IC    The signal circuit   
File Size149KB,17 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric Compare View All

DG534AAP/883 Overview

4-CHANNEL, VIDEO MULTIPLEXER, PDIP20

DG534AAP/883 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerVishay
package instructionDIP, DIP20,.3
Reach Compliance Codeunknow
JESD-30 codeR-PDIP-T20
JESD-609 codee0
Number of channels8
Number of functions1
Number of terminals20
Maximum on-state resistance (Ron)120 Ω
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP20,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5,15,-3 V
Certification statusNot Qualified
Filter level38535Q/M;38534H;883B
Maximum signal current0.02 A
Maximum supply current (Isup)5 mA
surface mountNO
Maximum connection time300 ns
switchBREAK-BEFORE-MAKE
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
DG534A/538A
Vishay Siliconix
4-/8-Channel Wideband Video Multiplexers
FEATURES
D
Wide Bandwidth: 500 MHz
D
Very Low Crosstalk: –97 dB @ 5 MHz
D
On-Board TTL-Compatible Latches with
Readback
D
Optional Negative Supply
D
Low r
DS(on)
: 45
W
D
Single-Ended or Differential Operation
D
Latch-up Proof
BENEFITS
D
D
D
D
D
D
D
Improved System Bandwidth
Improved Channel Off-Isolation
Simplified Logic Interfacing
High-Speed Readback
Allows Bipolar Signal Swings
Reduced Insertion Loss
Allows Differential Signal Switching
APPLICATIONS
D
Wideband Signal Routing and
Multiplexing
D
Video Switchers
D
ATE Systems
D
Infrared Imaging
D
Ultrasound Imaging
DESCRIPTION
The DG534A is a digitally selectable 4-channel or dual
2-channel multiplexer. The DG538A is an 8-channel or dual
4-channel multiplexer. On-chip TTL-compatible address
decoding logic and latches with data readback are included to
simplify the interface to a microprocessor data bus. The low
on-resistance and low capacitance of the these devices make
them ideal for wideband data multiplexing and video and audio
signal routing in channel selectors and crosspoint arrays. An
optional negative supply pin allows the handling of bipolar
signals without dc biasing.
The DG534A/DG538A are built on a D/CMOS process that
combines n-channel DMOS switching FETs with low-power
CMOS control logic, drivers and latches. The low-capacitance
DMOS FETs are connected in a “T” configuration to achieve
extremely high levels of off isolation. Crosstalk is reduced to
–97 dB at 5 MHz by including a ground line between adjacent
signal paths. An epitaxial layer prevents latch-up.
For more information refer to Vishay Siliconix applications
note AN502.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG534ADJ
Dual-In-Line
V+
GND
D
A
V+
S
A1
GND
S
A2
4/2
RS
WR
1
2
3
4
5
6
7
8
Latches/Drivers
9
12
11
Top View
EN
A
0
9
WR
10 11 12 13
EN
I/O
A1
A0
A
1
10
20 NC
19 D
B
18 V–
17 S
B1
16 GND
15 S
B2
14 V
L
13 I/O
S
A1
GND
S
A2
4/2
RS
4
5
6
7
8
Latch/Drivers
18 S
B1
17 GND
16 S
B2
15 V
L
14 NC
DG534ADN
PLCC
GND
DB
DA
V–
3
2
1
20 19
Top View
Document Number: 70069
S-05734—Rev. G, 29-Jan-02
www.vishay.com
1

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