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DG611_08

Description
QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO16
Categoryaccessories   
File Size129KB,10 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
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DG611_08 Overview

QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO16

DG611/612/613
Vishay Siliconix
High-Speed, Low-Glitch D/CMOS Analog Switches
DESCRIPTION
The DG611/612/613 feature high-speed low-capacitance
lateral DMOS switches. Charge injection has been
minimized to optimize performance in fast sample-and-hold
applications.
Each switch conducts equally well in both directions when on
and blocks up to 16 V
p-p
when off. Capacitances have been
minimized to ensure fast switching and low-glitch energy. To
achieve such fast and clean switching performance, the
DG611/612/613 are built on the Vishay Siliconix proprietary
D/CMOS process. This process combines n-channel DMOS
switching FETs with low-power CMOS control logic and
drivers. An epitaxial layer prevents latchup.
The DG611 and DG612 differ only in that they respond to
opposite logic levels. The versatile DG613 has two normally
open and two normally closed switches. It can be given
various configurations, including four SPST, two SPDT, one
DPDT.
For additional information see Applications Note AN207
(FaxBack number 70605).
FEATURES
Fast Switching - t
ON
: 12 ns
Low Charge Injection:
±
2 pC
Wide Bandwidth: 500 MHz
5 V CMOS Logic Compatible
Low r
DS(on)
: 18
Ω
Low Quiescent Power : 1.2 nW
Single Supply Operation
Pb-free
Available
RoHS*
COMPLIANT
BENEFITS
Improved Data Throughput
Minimal Switching Transients
Improved System Performance
Easily Interfaced
Low Insertion Loss
Minimal Power Consumption
APPLICATIONS
Fast Sample-and-Holds
Synchronous Demodulators
Pixel-Rate Video Switching
Disk/Tape Drives
DAC Deglitching
Switched Capacitor Filters
GaAs FET Drivers
Satellite Receivers
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG611
IN
1
D
1
S
1
V-
GND
S
4
D
4
IN
4
1
2
3
4
5
6
7
8
16
15
14
IN
2
D
2
S
2
V+
V
L
S
3
D
3
IN
3
9
10
11
12 13
D
4
IN
4
NC IN
3
D
3
Key
S
1
V-
NC
GND
S
4
4
5
6
7
8
3
2
DG611
D
1
IN
1
NC IN
2
D
2
1
20
19
18
17
S
2
V+
NC
V
L
S
3
Four SPST Switches per Package
TRUTH TABLE
Logic
0
1
Logic "0"
1 V
Logic "1"
4 V
DG611
ON
OFF
DG612
OFF
ON
Dual-In-Line
13
and SOIC
Top View
12
11
10
9
LCC
Top View
16
15
14
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 70057
S-71155–Rev. H, 11-Jun-07
www.vishay.com
1

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