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HMU65797N-6:D

Description
SRAM,
Categorystorage    storage   
File Size103KB,7 Pages
ManufacturerTEMIC
Websitehttp://www.temic.de/
Download Datasheet Parametric View All

HMU65797N-6:D Overview

SRAM,

HMU65797N-6:D Parametric

Parameter NameAttribute value
MakerTEMIC
package instruction,
Reach Compliance Codeunknow
ECCN codeEAR99
HM 65797
256 K x 1 High Speed CMOS SRAM
Introduction
The HM 65797 is a high speed CMOS static RAM
organized as 262, 144
×
1 bit. It is manufactured using
MHS high performance CMOS technology.
Access times as fast 20ns are available with maximum
power consumption of only 770 mW.
The HM 65797 features fully static operation requiring no
external clocks or timing strobes. The automatic
power-down feature reduces the power consumption by
67 % when the circuit is deselected.
Easy memory expansion is provided by an active low chip
select (CS) and three state drivers.
All inputs and outputs of the HM 65797 are TTL
compatible and operate from single 5 V supply thus
simplifying system design.
The HM 65797 is 100 % processed following the test
methods of MIL STD 883 and/or ESA/SCC 9000 making
it ideally suitable for military/space applications that
demand superior levels of performance and reliability.
Features
D
Fast access time
Commercial/industrial : 20/25/35/45/55 ns (max)
Military : 25/35/45/55 ns (max)
D
Low power consumption
Active : 770 mW
Standby : 220 mW
D
Wide temperature range :
–55°C to + 125°C
D
300 mils width package
D
TTL compatible inputs and outputs asynchronous
D
Capable of withstanding greater than 2000V electrostatic
discharge single 5 volt supply
Interface
Block Diagram
MATRA MHS
Rev. D (16 April.97)
1
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