DS26C32AT datasheet, PDF - EEWORLD Datasheet

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DS26C32AT: DescriptionQUAD LINE RECEIVER, CQCC20; Categorysemiconductor Analog mixed-signal IC; File Size352KB，11 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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DS26C32AT Overview

QUAD LINE RECEIVER, CQCC20

DS26C32AT Parametric

Parameter Name	Attribute value
Number of functions	4
Number of terminals	20
Maximum operating temperature	125 Cel
Minimum operating temperature	-55 Cel
Maximum supply voltage 1	5.5 V
Minimum supply voltage 1	4.5 V
Rated supply voltage 1	5 V
Processing package description	Ceramic, LCCC-20
state	ACTIVE
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	ChipCARRIER
surface mount	Yes
Terminal form	NO
Terminal spacing	1.27 mm
Terminal location	Four
Packaging Materials	Ceramic, Metal-SEALED COFIRED
Temperature level	MILITARY
Interface Type	line receiver
Interface standards	EIA-422; EIA-423; FED STD 1020; FED STD 1030
Max TPHL receiver	35 ns
Input properties	Differential SCHMITT flip-flop
Number of receiver bits	4

DS26C32AT Related Products

	DS26C32AT	DS26C32A	DS26C32AME/883	DS26C32AMJ/883	DS26C32AMW/883	DS26C32ATM	DS26C32ATN
Description	QUAD LINE RECEIVER, CQCC20	QUAD LINE RECEIVER, CQCC20	QUAD LINE RECEIVER, CQCC20	QUAD LINE RECEIVER, CDIP16	QUAD LINE RECEIVER, CDFP16	QUAD LINE RECEIVER, PDSO16	LINE RECEIVER
Number of functions	4	4	4	4	4	4	4
Number of terminals	20	20	20	16	16	16	16
Maximum operating temperature	125 Cel	125 Cel	125 °C	125 °C	125 °C	85 °C	85 °C
Minimum operating temperature	-55 Cel	-55 Cel	-55 °C	-55 °C	-55 °C	-40 °C	-40 °C
surface mount	Yes	Yes	YES	NO	YES	YES	NO
Terminal form	NO	NO	NO LEAD	THROUGH-HOLE	FLAT	GULL WING	THROUGH-HOLE
Terminal location	Four	Four	QUAD	DUAL	DUAL	DUAL	DUAL
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	INDUSTRIAL	INDUSTRIAL
Interface standards	EIA-422; EIA-423; FED STD 1020; FED STD 1030	EIA-422; EIA-423; FED STD 1020; FED STD 1030	EIA-422; EIA-423; FED STD 1020; FED STD 1030	EIA-422; EIA-423; FED STD 1020; FED STD 1030	EIA-422; EIA-423; FED STD 1020; FED STD 1030	EIA-422; EIA-423; FED STD 1020; FED STD 1030	EIA-422; EIA-423; FED STD 1020; FED STD 1030
Input properties	Differential SCHMITT flip-flop	Differential SCHMITT flip-flop	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL SCHMITT TRIGGER	DIFFERENTIAL SCHMITT TRIGGER
Number of receiver bits	4	4	4	4	4	4	4
Is it Rohs certified?	-	-	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	-	-	National Semiconductor（TI ）	National Semiconductor（TI ）	-	National Semiconductor（TI ）	National Semiconductor（TI ）
package instruction	-	-	QCCN, LCC20,.35SQ	CERDIP-16	CERAMIC, DFP-16	SOP-16	PLASTIC, DIP-16
Reach Compliance Code	-	-	compli	_compli	_compli	_compli	_compli
ECCN code	-	-	EAR99	EAR99	EAR99	EAR99	EAR99
Interface integrated circuit type	-	-	LINE RECEIVER	LINE RECEIVER	LINE RECEIVER	LINE RECEIVER	LINE RECEIVER
JESD-30 code	-	-	S-CQCC-N20	R-GDIP-T16	R-GDFP-F16	R-PDSO-G16	R-PDIP-T16
length	-	-	8.89 mm	19.43 mm	-	9.9 mm	19.304 mm
Humidity sensitivity level	-	-	1	1	1	1	1
Output characteristics	-	-	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Maximum output low current	-	-	0.006 A	0.006 A	0.006 A	0.006 A	0.006 A
Output polarity	-	-	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED
Package body material	-	-	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	-	QCCN	DIP	DFP	SOP	DIP
Encapsulate equivalent code	-	-	LCC20,.35SQ	DIP16,.3	FL16,.3	SOP16,.25	DIP16,.3
Package shape	-	-	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	-	-	CHIP CARRIER	IN-LINE	FLATPACK	SMALL OUTLINE	IN-LINE
Peak Reflow Temperature (Celsius)	-	-	NOT APPLICABLE	NOT APPLICABLE	NOT APPLICABLE	235	260
power supply	-	-	5 V	5 V	5 V	5 V	5 V
Certification status	-	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum receive delay	-	-	35 ns	35 ns	35 ns	30 ns	30 ns
Maximum seat height	-	-	1.905 mm	5.08 mm	2.032 mm	1.75 mm	5.08 mm
Maximum supply voltage	-	-	5.5 V	5.5 V	5.5 V	5.5 V	-
Minimum supply voltage	-	-	4.5 V	4.5 V	4.5 V	4.5 V	-
Nominal supply voltage	-	-	5 V	5 V	5 V	5 V	5 V
technology	-	-	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal pitch	-	-	1.27 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm
Maximum time at peak reflow temperature	-	-	NOT APPLICABLE	NOT APPLICABLE	NOT APPLICABLE	30	40
width	-	-	8.89 mm	7.62 mm	6.35 mm	3.9 mm	7.62 mm
JESD-609 code	-	-	-	e0	e0	e0	e0
Terminal surface	-	-	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn85Pb15)

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