LV11B Series 3.3 V
LVDS Clock Oscillators
January 2014
This device is supported for legacy designs only, LV11B is not recommended for
new designs.
• Pletronics’ LV11B Series is a quartz crystal
controlled precision square wave generator with
an LVDS output.
• Solder pad compatible with many 9x14 Plastic J-
lead packages.
• FR4 base may or may not have a mechanical
metal cover.
• Tape and Reel or cut tape packaging is available.
•
•
•
•
•
80 to 700 MHz
9.9mm x 13.97mm ‘B’ package
Enable/Disable Function on pad 2
Does NOT permit “wired-OR” of outputs
Low Jitter
Pletronics Inc. certifies this device is in accordance with the
RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 2.18 grams or .82 grams or 1.51 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
V
CC
Supply Voltage
Vi
Vo
Input Voltage
Output Voltage
Unit
-0.5V to +7.0V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
Thermal Characteristics
The maximum die or junction temperature is 155
o
C
The thermal resistance junction to board is 60 to 100
o
C/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necessarily include testing of all parameters.
Copyright © 2006, 2007, 2008 Pletronics Inc.
LV11B Series 3.3 V
LVDS Clock Oscillators
January 2008
Part Number:
LV11
45
B
E
V
-125.0M
-XX
Packaging code or blank
T250 = 250 per Tape and Reel
T500 = 500 per Tape and Reel
T1K = 1000 per Tape and Reel
Frequency in MHz
Supply Voltage V
CC
V
= 3.3V _ 10%
+
Optional Enhanced OTR
Blank
= Temp. range -10 to +70
o
C
E
= Temp. range -40 to +85
o
C
Series Model
Frequency Stability
45
= _ 50 ppm
+
44
= _ 25 ppm
+
20
= _ 20 ppm
+
Series Model
Legend:
PLE
= Pletronics
FFFF.F
M
= Frequency in MHz
YMD or YYWW
= Date of Manufacture (Year - month - day or year and week)
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc.
are not identified from the marking. External packaging labels and packing list will correctly
identify the ordered Pletronics part number.
Codes for Date Code YMD
Code
Year
Code
Month
Code
Day
Code
Day
Code
Day
1
1
D
13
T
25
6
2006
A
JAN
2
2
E
14
U
26
7
2007
B
FEB
3
3
F
15
V
27
8
2008
C
MAR
4
4
G
16
W
28
9
2009
D
APR
E
MAY
5
5
H
17
X
29
0
2010
F
JUN
6
6
J
18
Y
30
1
2011
G
JUL
7
7
K
19
Z
31
H
AUG
8
8
L
20
2
2012
J
SEP
9
9
M
21
K
OCT
A
10
N
22
L
NOV
B
11
P
23
M
DEC
C
12
R
24
Part Marking:
PLE
LV11B
FFFF.F
M
C
YMDXX
or
LV11BX
FFFF.F
M
PLE
XX
C
YYWWXX
www.pletronics.com
425-776-1880
2
LV11B Series 3.3 V
LVDS Clock Oscillators
January 2008
Electrical Specification for 3.30V _10% over the specified temperature range
+
Item
Frequency Range
Frequency Accuracy “45"
“44"
“20"
Output Waveform
Output High Level
Output Low Level
Differential Output (V
OD
)
Output Offset Voltage (V
OS
)
Differential Output Error (dV
OS
)
Output Symmetry
Output T
RISE
and T
FALL
--
0.90
250
1.125
--
45
300
400
Jitter
-
-
Vcc Supply Current
Enable/Disable Internal Pull-up
V disable
V enable
Enable
Disable time
Start up time
Operating Temperature Range
-
50
-
2.0
-
-
-
-10
-40
Storage Temperature Range
-55
Min
1
-50
-25
-20
Max
700
+50
+25
+20
LVDS
1.60
--
450
1.375
50
55
700
900
0.2
2.8
90
-
0.8
-
100
100
5
+70
+85
+125
mA
Kohm
Volts
Volts
nS
nS
mS
o
o
o
Unit
MHz
ppm
Condition
For all supply voltages, load changes, aging for 1
year, shock, vibration and temperatures
Volts
Volts
mVolts
Volts
mVolts
%
pS
pS
pS RMS
Referenced to 50% of amplitude or crossing point
> 80 MHz
< 80 MHz
Vth is 20% and 80% of waveform
> 80 MHz
See load circuit
R1 = 50 ohms
Measured from 12KHz to 20MHz from Fnominal
Measured from 10Hz to 1MHz from Fnominal
> 80 MHz
Includes current of properly
terminated device
To Vcc (equivalent resistance)
Referenced to Ground
Time for output to reach a logic state
Time for output to reach a high Z state
> 80 MHz
Measured from the time
Vcc = 3.0V
C
C
C
Standard Temperature Range
Extended Temperature Range
“E” Option
Specifications with Pad 2 E/D open circuit
www.pletronics.com
425-776-1880
3
LV11B Series 3.3 V
LVDS Clock Oscillators
January 2008
Typical Phase-Noise Response
0
-20
-40
dBc/Hz
-60
-80
-100
-120
-140
-160
10
1,000
100,000
10,000,000
Frequency (Hz)
Load Circuit
Test Waveform
Symmetry
Vhigh
80%
50%
20%
Vlow
Trise
Tfall
Out
Out*
www.pletronics.com
425-776-1880
4
LV11B Series 3.3 V
LVDS Clock Oscillators
January 2008
Reliability
: Environmental Compliance
Parameter
Mechanical Shock
Vibration
Solderability
Thermal Shock
Condition
MIL-STD-883 Method 2002, Condition B
MIL-STD-883 Method 2007, Condition A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Human Body Model
Charged Device Model
Minimum Voltage
1500
1000
Conditions
MIL-STD-883 Method 3115
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
Layout and application information
Recommend connecting Pad 1 and Pad 2 together to permit the design to accept Enable/Disable on both
input pads
For Optimum Jitter Performance, Pletronics recommends:
•
a ground plane under the device
•
no large transient signals (both current and voltage) should be routed under the device
•
do not layout near a large magnetic field such as a high frequency switching power supply
•
do not place near piezoelectric buzzers or mechanical fans.
www.pletronics.com
425-776-1880
5
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