HCPL-316J
2.5 Amp Gate Drive Optocoupler with Integrated (V
CE
)
Desaturation Detection and Fault Status Feedback
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully
compliant options available;
-xxxE
denotes a
lead-free
product
Description
Avago’s 2.5 Amp Gate Drive Optocoupler with Integrated
Desaturation (V
CE
) Detection and Fault Status Feedback
makes IGBT V
CE
fault protection compact, affordable, and
easy-to-implement while satisfying worldwide safety and
regulatory requirements.
Features (continued)
x
“Soft” IGBT turn-off
x
Integrated fail-safe IGBT protection
– Desat (V
CE
) detection
– Under Voltage Lock-Out protection (UVLO)
with hysteresis
x
User configurable: inverting, noninverting, auto-reset,
auto-shutdown
x
Wide operating V
CC
range: 15 to 30 Volts
x
-40°C to +100°C operating temperature range
x
15 kV/μs min. Common Mode Rejection (CMR) at
V
CM
= 1500V
x
Regulatory approvals: UL, CSA, IEC/EN/DIN EN 60747-
5-2 (1230V
peak
Working Voltage)
Features
x
x
x
x
x
x
2.5 A maximum peak output current
Drive IGBTs up to I
C
= 150 A, V
CE
= 1200V
Optically isolated, FAULT status feedback
SO-16 package
CMOS/TTL compatible
500 ns max. switching speeds
Fault Protected IGBT Gate Drive
+HV
ISOLATION
BOUNDARY
HCPL - 316J
ISOLATION
BOUNDARY
HCPL - 316J
ISOLATION
BOUNDARY
HCPL - 316J
3-PHASE
INPUT
M
HCPL - 316J
HCPL - 316J
HCPL - 316J
HCPL - 316J
ISOLATION
BOUNDARY
–HV
ISOLATION
BOUNDARY
ISOLATION
BOUNDARY
ISOLATION
BOUNDARY
FAULT
MICRO-CONTROLLER
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Typical Fault Protected IGBT Gate Drive Circuit
The HCPL-316J is an easy-to-use, intelligent gate driver
which makes IGBT V
CE
fault protection compact, afford-
able, and easy-to-implement. Features such as user con-
figurable inputs, integrated V
CE
detection, under volt-
age lockout (UVLO), “soft” IGBT turn-off and isolated fault
feedback provide maximum design flexibility and circuit
protection.
HCPL-316J
1
2
3
μC
R
F
+
–
4
5
6
7
8
V
IN+
V
IN-
V
CC1
GND1
RESET
FAULT
V
LED1+
V
LED1-
V
E
V
LED2+
DESAT
V
CC2
V
C
V
OUT
V
EE
V
EE
16
15
14
13
12
11
10
9
R
PULL-DOWN
–
* THESE COMPONENTS ARE ONLY REQUIRED WHEN NEGATIVE GATE DRIVE IS IMPLEMENTED.
*
C
BLANK
100
Ω
D
DESAT
+
V
F
–
*
+
–
+
R
G
V
CE
–
+
*
–
+
V
CE
Figure 1. Typical desaturation protected gate drive circuit, noninverting.
Description of Operation during Fault Condition
1. DESAT terminal monitors the IGBT V
CE
voltage through
D
DESAT
.
2. When the voltage on the DESAT terminal exceeds
7 volts, the IGBT gate voltage (V
OUT
) is slowly
lowered.
3. FAULT output goes low, notifying the microcontroller
of the fault condition.
4. Microcontroller takes appropriate action.
Output Control
The outputs (V
OUT
and FAULT) of the HCPL-316J are con-
trolled by the combination of V
IN
, UVLO and a detected
IGBT Desat condition. As indicated in the below table, the
HCPL-316J can be configured as inverting or non-invert-
ing using the V
IN+
or V
IN-
inputs respectively. When an in-
verting configuration is desired, V
IN+
must be held high
and V
IN-
toggled. When a non-inverting configuration is
desired, V
IN-
must be held low and V
IN+
toggled. Once
UVLO is not active (V
CC2
- V
E
> V
UVLO
), V
OUT
is allowed to
go high, and the DESAT (pin 14) detection feature of the
HCPL-316J will be the primary source of IGBT protection.
UVLO is needed to ensure DESAT is functional. Once V
U-
VLO+
> 11.6 V, DESAT will remain functional until V
UVLO-
<
12.4 V. Thus, the DESAT detection and UVLO features of
the HCPL-316J work in conjunction to ensure constant
IGBT protection.
Pin 6
(FAULT)
Output
X
Low
X
X
High
V
IN+
X
X
Low
X
High
V
IN-
X
X
X
High
Low
UVLO
(V
CC2
- V
E
)
Active
X
X
X
Not Active
Desat Condition
Detected on
Pin 14
X
Yes
X
X
No
V
OUT
Low
Low
Low
Low
High
2
Product Overview Description
The HCPL-316J is a highly integrated power control de-
vice that incorporates all the necessary components for a
complete, isolated IGBT gate drive circuit with fault pro-
tection and feedback into one SO-16 package. TTL input
logic levels allow direct interface with a microcontroller,
and an optically isolated power output stage drives
IGBTs with power ratings of up to 150 A and 1200 V. A
high speed internal optical link minimizes the propaga-
tion delays between the microcontroller and the IGBT
while allowing the two systems to operate at very large
common mode voltage differences that are common in
industrial motor drives and other power switching ap-
plications. An output IC provides local protection for
the IGBT to prevent damage during overcurrents, and a
second optical link provides a fully isolated fault status
feedback signal for the microcontroller. A built in “watch-
dog” circuit monitors the power stage supply voltage to
prevent IGBT caused by insufficient gate drive voltages.
This integrated IGBT gate driver is designed to increase
the performance and reliability of a motor drive without
the cost, size, and complexity of a discrete design.
Two light emitting diodes and two integrated circuits
housed in the same SO-16 package provide the input
control circuitry, the output power stage, and two op-
tical channels. The input Buffer IC is designed on a bi-
polar process, while the output Detector IC is designed
manufactured on a high voltage BiCMOS/Power DMOS
V
LED1+
7
INPUT IC
V
IN+
V
IN-
1
2
LED1
D
R
I
V
E
R
V
LED1-
8
13
12
V
CC2
V
C
process. The forward optical signal path, as indicated by
LED1, transmits the gate control signal. The return opti-
cal signal path, as indicated by LED2, transmits the fault
status feedback signal. Both optical channels are com-
pletely controlled by the input and output ICs respec-
tive-ly, making the internal isolation boundary transpar-
ent to the microcontroller.
Under normal operation, the input gate control signal di-
rectly controls the IGBT gate through the isolated output
detector IC. LED2 remains off and a fault latch in the in-
put buffer IC is disabled. When an IGBT fault is detected,
the output detector IC immediately begins a “soft” shut-
down sequence, reducing the IGBT current to zero in a
controlled manner to avoid potential IGBT damage from
inductive overvoltages. Simultaneously, this fault status
is transmitted back to the input buffer IC via LED2, where
the fault latch disables the gate control input and the ac-
tive low fault output alerts the microcontroller.
During power-up, the Under Voltage Lockout (UVLO) fea-
ture prevents the application of insufficient gate voltage
to the IGBT, by forcing the HCPL-316J’s output low. Once
the output is in the high state, the DESAT (V
CE
) detec-
tion feature of the HCPL-316J provides IGBT protection.
Thus, UVLO and DESAT work in conjunction to provide
constant IGBT protection.
UVLO
11
14
V
OUT
DESAT
V
CC1
3
DESAT
9,10
SHIELD
LED2
16
V
EE
V
E
RESET
FAULT
5
FAULT
6
SHIELD
OUTPUT IC
4
GND1
15
V
LED2+
3
Package Pin Out
1
2
3
4
5
6
7
8
V
IN+
V
IN-
V
CC1
GND1
RESET
FAULT
V
LED1+
V
LED1-
V
E
V
LED2+
DESAT
V
CC2
V
C
V
OUT
V
EE
V
EE
16
15
14
13
12
11
10
9
Pin Descriptions
Symbol
V
IN+
V
IN-
Description
Noninverting gate drive voltage output (V
OUT
)
control input.
Inverting gate drive voltage output
(V
OUT
) control input.
Positive input supply voltage. (4.5 V to 5.5 V)
Symbol
V
E
V
LED2+
Description
Common (IGBT emitter) output supply voltage.
LED 2 anode. This pin must be left unconnected
for guaranteed data sheet performance. (For
optical coupling testing only.)
Desaturation voltage input. When the voltage
on DESAT exceeds an internal reference
voltage of 7 V while the IGBT is on, FAULT
output is changed from a high impedance
state to a logic low state within 5 μs. See
Note 25.
Positive output supply voltage.
Collector of output pull-up triple-darlington
transistor. It is connected to V
CC2
directly or
through a resistor to limit output turn-on
current.
V
CC1
DESAT
GND1
RESET
Input Ground.
FAULT reset input. A logic low input for at least
0.1 μs, asynchronously resets FAULT output high
and enables V
IN
. Synchronous control of RESET
relative to V
IN
is required. RESET is not affected
by UVLO. Asserting RESET while V
OUT
is high does
not affect V
OUT
.
Fault output. FAULT changes from a high
impedance state to a logic low output within
5 μs of the voltage on the DESAT pin exceeding
an internal reference voltage of 7 V. FAULT
output remains low until RESET is brought low.
FAULT output is an open collector which allows
the FAULT outputs from all HCPL-316Js in a
circuit to be connected together in a “wired OR”
forming a single fault bus for interfacing directly
to the micro-controller.
LED 1 anode. This pin must be left unconnected
for guaranteed data sheet performance. (For
optical coupling testing only.)
LED 1 cathode. This pin must be connected to
ground.
V
CC2
V
C
FAULT
V
OUT
Gate drive voltage output.
V
LED1+
V
EE
Output supply voltage.
V
LED1-
4
Ordering Information
HCPL-316J is UL Recognized with 5000 Vrms for 1 minute per UL1577.
Option
Part number
HCPL-316J
RoHS
Compliant
-000E
-500E
Non RoHS
Compliant
No option
#500
Package
SO-16
Surface
Mount
X
X
Tape
& Reel
X
IEC/EN/DIN EN
60747-5-2
Quantity
X
X
45 per tube
850 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-316J-500E to order product of SO-16 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN
EN 60747-5-2 Safety Approval in RoHS compliant.
Example 2:
HCPL-316J to order product of SO-16 Surface Mount package in tube packaging with IEC/EN/DIN EN 60747-5-2
Safety Approval and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and
RoHS compliant option will use ‘-XXXE‘.
Package Outline Drawings
16-Lead Surface Mount
0.018
(0.457)
16 15 14 13 12 11 10 9
TYPE NUMBER
DATE CODE
A 316J
YYWW
0.295 ± 0.010
(7.493 ± 0.254)
0.458 (11.63)
0.050
(1.270)
LAND PATTERN RECOMMENDATION
1
2
3
4
5
6
7
8
0.025 (0.64)
0.085 (2.16)
0.406 ± 0.10
(10.312 ± 0.254)
9
°
0.345 ± 0.010
(8.763 ± 0.254)
ALL LEADS
TO BE
COPLANAR
± 0.002
0.018
(0.457)
0.138 ± 0.005
(3.505 ± 0.127)
0–8
°
0.025 MIN.
0.408 ± 0.010
(10.363 ± 0.254)
0.008 ± 0.003
(0.203 ± 0.076)
STANDOFF
Dimensions in inches (millimeters)
Notes:
Initial and continued variation in the color of the HCPL-316J’s white mold compound is normal and does note affect
device performance or reliability.
Floating Lead Protrusion is 0.25 mm (10 mils) max.
5
Microchip MCU
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