EEWORLDEEWORLDEEWORLD

Part Number

Search

5962H9855202QXA

Description
RISC Microcontroller, 32-Bit, 16MHz, CMOS, CPGA145, CERAMIC, PGA-145
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size3MB,62 Pages
ManufacturerDefense Logistics Agency
Download Datasheet Parametric View All

5962H9855202QXA Overview

RISC Microcontroller, 32-Bit, 16MHz, CMOS, CPGA145, CERAMIC, PGA-145

5962H9855202QXA Parametric

Parameter NameAttribute value
MakerDefense Logistics Agency
Parts packaging codePGA
package instructionPGA,
Contacts145
Reach Compliance Codeunknown
ECCN code3A001.A.1.A
Has ADCNO
Address bus width20
bit size32
maximum clock frequency16 MHz
DAC channelNO
DMA channelNO
External data bus width16
JESD-30 codeS-CPGA-P145
JESD-609 codee0
length39.751 mm
Number of terminals145
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
PWM channelNO
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codePGA
Package shapeSQUARE
Package formGRID ARRAY
Certification statusQualified
Filter levelMIL-PRF-38535 Class Q
speed16 MHz
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
total dose1M Rad(Si) V
width39.751 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC
Standard Products
UT69R000 RadHard MicroController
Data Sheet
Jan. 1999
q
Harvard architecture
- 64K data space
- 1M instruction space
q
High throughput engine
- 2 clocks per instruction
- 8 MIPS @ 16 MHz
- Static design
q
15 levels of interrupts
- 8 external user defined interrupts
- Machine error and power fail
q
Two on-board 16-bit interval timers
- Timer A, 10
µs/bit
- Timer B, 100
µs/bit
resolution
q
8-bit software controlled output discrete bus
q
Register- oriented architecture has 21
user-accessible registers
- 16-bit or 32-bit register configurations
q
Supports direct memory access (DMA) system
configuration
OSCOUT
OE
WE
BRQ
BGNT
BUSY
BGACK
NUI1
NUI2
NUI3
STATE1
DI1
DI2
MEMORY
CONTROL
BUS
ARBITRA-
TION
PROCES-
SOR
STATUS
OSCIN
SYSCLK
q
Built-in 9600 baud UART
q
Full military operating temperature range, -55
o
C to
+125
o
C, in accordance with MIL-PRF-3853 for Class Q
or V
q
Radiation-hardened process and design; total dose
irradiation testing to MIL-STD-883 Method 1019
- Total dose: 1.0E6 rads(Si)
- Dose rate upset: 1.0E9 rads(Si)
- Dose rate survival: 1.0E11 rads(Si)
- Single event upset: < 25.6E-6 errors/device-day
q
Post-radiation AC/DC performance characteristics
guaranteed by MIL-STD-883 Method 1019 testing
at 1.0E6 rads(Si)
q
Latchup immune 1.5-micron CMOS, epitaxial,
double-level-metal technology
q
Packaging options:
- 132-lead flatpack
- 144-pin pingrid array (plus one index pin)
16
TIMCLK
TES
T
UARTOUT
UARTIN
UART
OSCILLATOR
/CLOCK
SHIFT REG
PROCESSOR
CONTROL
LOGIC
ID
32
GENERAL
PURPOSE
REGISTERS
TBR
RBR
TR
32
32
BIT REG
32
TB
IM
TEMP DEST
16
TEMP SRC
FR
PI
ST
SW
32
32
16
16
16
16
16
16
16
I/O
MUX
INSTRUCTION
DATA
16
IC/ICs
INSTRUCTION
ADDRESS
MCHNE1
BTERR
MCHNE2
MPROT
PFAIL
INT5
INT6
INT0-4
MRST
20
ADD
MUX
32
ACC
32
PIPELINE
BUS
CONTROL
8
16
OD(7:0)
OPERAND
DATA
DTACK
M/IO
R/WR
DS
OPERAND
ADDRESS
A MUX
INTER-
RUPTS
B MUX
16
32
16
32-BIT ALU
ADDR
MUX
5
Figure 1. UT69R000 Functional Block Diagram
Visual ball color recognition system based on STM32F7-effect
I can't upload videos. What bad luck! [url=http://v.youku.com/v_show/id_XMTQyNjEyMTcwOA==_type_99.html?from=y1.2-1.2]http://v.youku.com/v_show/id_XMT ... .html?from=y1.2-1.2[/url] [media=swf,500,375]h...
54chenjq stm32/stm8
A joke I experienced personally
When we were in school, we all learned advanced mathematics, including the "Lagrange" theorem and the "Newton-Lagrange" formula, right?Maybe everyone has forgotten, but I haven't. I have forgotten wha...
ddllxxrr Talking
Beaglebone Learning 4--Peripheral Circuit Design (Completed)
With reference to the information from the forum friends and the Internet, I have basically thought of the design of the peripheral circuit, which mainly has the following functions: 1. LCD + touch sc...
fengzhang2002 DSP and ARM Processors
Dear seniors, I am using NIOS II11.0 and now I have a problem. I would like to trouble you to take a look. I am very confused.
I am using nios ii version 11.0. Now I need to create the target board FLASH programming design myself, but I can't find the nios ii sdk shell and can't do it. I need your guidance....
leizikobe FPGA/CPLD
Recommend a good article on SAR-ADC engineering design
[align=center][b][color=#000000][font=宋体]The 80% of the key points that are often overlooked, SAR-ADC voltage reference circuit[/font][/color][/b][/align]...
hanskying666 Analogue and Mixed Signal
Wow, this explanation is also OK
[size=3]Why are boys envied for having many girlfriends, while girls despised for having many boyfriends? It’s like a key that can open many locks, called a master key, and if a lock can be opened by ...
小娜 Talking

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2150  2216  156  2151  1067  44  45  4  22  21 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号