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74V2G14

Description
TRIPLE SCHMITT INVERTER
File Size137KB,8 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
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74V2G14 Overview

TRIPLE SCHMITT INVERTER

74V2G14
TRIPLE SCHMITT INVERTER
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 3.0ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1µA(MAX.) at T
A
= 25°C
TYPICAL HYSTERESIS:
V
H
= 800mV at V
CC
= 4.5V
V
H
= 500mV at V
CC
= 3.0V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
II
OH
| = I
OL
= 4mA (MIN) at V
CC
= 3.0V
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
IMPROVED LATCH-UP IMMUNITY
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
74V2G14STR
DESCRIPTION
The 74V2G14 is an advanced high-speed CMOS
TRIPLE
SCHMITT
TRIGGER INVERTER
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS tecnology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
PIN CONNECTION AND IEC LOGIC SYMBOLS
O
so
b
te
le
r
P
uc
od
s)
t(
bs
-O
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage.
Pin configuration and function are the same as
those of the 74V2G04, but 74V2G14 has
hysteresis on inputs.
This device can be used to interface 5V to 3V
systems and it is ideal for portable applications
like personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
et
l
o
P
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r
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t(
uc
T&R
June 2003
1/8

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