STP3NC50
N-CHANNEL 500V - 3Ω - 2.8A TO-220
PowerMesh™II MOSFET
TYPE
STP3NC50
s
s
s
s
s
V
DSS
500 V
R
DS(on)
<4
Ω
I
D
2.8 A
TYPICAL R
DS
(on) = 3
Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
NEW HIGH VOLTAGE BENCHMARK
GATE CHARGE MINIMIZED
3
1
2
DESCRIPTION
The PowerMESH
™
II is the evolution of the first
generation of MESH OVERLAY
™.
The layout re-
finements introduced greatly improve the Ron*area
figure of merit while keeping the device at the lead-
ing edge for what concerns swithing speed, gate
charge and ruggedness.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVER
s
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(1)
P
TOT
dv/dt
T
stg
T
j
.
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 kΩ)
Gate- source Voltage
Drain Current (continuos) at T
C
= 25°C
Drain Current (continuos) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
500
500
±30
2.8
1.8
11.2
75
0.6
3
–60 to 150
150
(1)I
SD
≤
2.8A, di/dt
≤100A/µs,
V
DD
≤
V
(BR)DSS
, T
j
≤
T
JMAX
Unit
V
V
V
A
A
A
W
W/°C
V/ns
°C
°C
(•)Pulse width limited by safe operating area
May 2001
1/8
STP3NC50
THERMAL DATA
Rthj-case
Rthj-amb
T
l
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
1.67
62.5
300
°C/W
°C/W
°C
AVALANCHE CHARACTERISTICS
Symbol
I
AR
E
AS
Parameter
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
Single Pulse Avalanche Energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Max Value
2.8
110
Unit
A
mJ
ELECTRICAL CHARACTERISTICS
(TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V
(BR)DSS
I
DSS
I
GSS
Parameter
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
Test Conditions
I
D
= 250 µA, V
GS
= 0
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 °C
V
GS
= ±30V
Min.
500
1
50
±100
Typ.
Max.
Unit
V
µA
µA
nA
ON (1)
Symbol
V
GS(th)
R
DS(on)
Parameter
Gate Threshold Voltage
Static Drain-source On
Resistance
Test Conditions
V
DS
= V
GS
, I
D
= 250µA
V
GS
= 10V, I
D
= 1.4 A
Min.
2
Typ.
3
3
Max.
4
4
Unit
V
Ω
DYNAMIC
Symbol
g
fs
(1)
C
iss
C
oss
C
rss
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
V
DS
> I
D(on)
x R
DS(on)max,
I
D
= 1.4A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
Min.
Typ.
2
260
45
5
Max.
Unit
S
pF
pF
pF
2/8
STP3NC50
ELECTRICAL CHARACTERISTICS
(CONTINUED)
SWITCHING ON
Symbol
t
d(on)
t
r
Q
g
Q
gs
Q
gd
Parameter
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V
DD
= 250V, I
D
= 1.4 A
R
G
= 4.7Ω V
GS
= 10V
(see test circuit, Figure 3)
V
DD
= 400V, I
D
= 2.8 A,
V
GS
= 10V
Min.
Typ.
10
10
10
2.5
4.5
13.5
Max.
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
Symbol
t
r(Voff)
t
f
t
c
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
V
DD
= 400V, I
D
= 2.8 A,
R
G
= 4.7Ω, V
GS
= 10V
(see test circuit, Figure 5)
Min.
Typ.
10
8
20
Max.
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
I
SD
I
SDM
(2)
V
SD
(1)
t
rr
Q
rr
I
RRM
Parameter
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 2.8 A, V
GS
= 0
I
SD
= 2.8A, di/dt = 100A/µs,
V
DD
= 100V, Tj = 150°C
(see test circuit, Figure 5)
380
2200
11.5
Test Conditions
Min.
Typ.
Max.
2.8
11.2
1.6
Unit
A
A
V
ns
nC
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedence
3/8
STP3NC50
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STP3NC50
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
FPGA/CPLD
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