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CS16LV81923AGCR70

Description
Standard SRAM, 512KX16, 70ns, CMOS, PDSO44, 0.400 INCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-44
Categorystorage    storage   
File Size377KB,19 Pages
ManufacturerChiplus Semiconductor Corp
Environmental Compliance
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CS16LV81923AGCR70 Overview

Standard SRAM, 512KX16, 70ns, CMOS, PDSO44, 0.400 INCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-44

CS16LV81923AGCR70 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerChiplus Semiconductor Corp
package instructionTSOP2,
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time70 ns
JESD-30 codeR-PDSO-G44
length18.41 mm
memory density8388608 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals44
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize512KX16
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
width10.16 mm
High Speed Super Low Power SRAM
512k Word By 16 bit
CS16LV81923
Revision History
Rev. No.
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
History
Initial issue with new naming rule
Add 48CSP-6x8mm package outline
Revise 48CSP-8x10mm pkg code from W to K
Revised DC characteristics
Revised DC characteristics
Change wafer process from 0.18um to 0.15um
Add CE2 description of 48BGA package
Modify Data Retention waveform
Issue Date
Feb.15, 2005
Mar. 08, 2005
Oct. 25, 2005
Nov. 23, 2006
Jun. 20,2007
May. 19, 2008
Nov. 20, 2009
May. 27.2010
1
Rev. 2.7
Chiplus reserves the right to change product or specification without notice.
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