High Speed Super Low Power SRAM
128K Word By 8 Bit
CS18LV10245
Revision History
Rev. No.
1.0
1.1
1.2
1.3
History
New Issue
Add a new 32L WSON-8x8mm package
Revise I
CCSB1
Typ
Remove WSON
Issue Date
Jun.29, 2005
Aug.12, 2005
Apr. 07,2006
June.12.2006
Remark
1
Rev. 1.3
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
128K Word By 8 Bit
CS18LV10245
GENERAL DESCRIPTION
The CS18LV10245 is a high performance; high speed and super low power CMOS Static Random
Access Memory organized as 131,072 words by 8bits and operates from a wide range of 4.5 to 5.5V supply
voltage. Advanced CMOS technology and circuit techniques provide high speed, super low power features
and maximum access time of 55/ 70ns in 5.0V operation. Easy memory expansion is provided by an active
LOW chip enable inputs (/CE1, CE2) and active LOW output enable (/OE).
The CS18LV10245 has an automatic power down feature, reducing the power consumption significantly
when chip is deselected. The CS18LV10245 is available in JEDEC standard 32-pin sTSOP 1- 8x13.4 mm,
TSOP 1- 8x20mm, TSOP 2- 400mil , SOP- 450 mil, PDIP- 600 mil.
FEATURES
Wide operation voltage: 4.5~5.5V
Ultra low power consumption : 2mA＠1MHz (Max.) , Vcc=5.0V.
High speed access time: 55/70ns.
Automatic power down when chip is deselected.
Three state outputs and TTL compatible.
Data retention supplies voltage as low as 2.0V.
Easy expansion with (/CE1, CE2) and /OE options.
Product Family
Part No.
Operating Temp
Standby (Max)
(Vcc = 5.0V)
Vcc. Range Speed (ns)
Package Type
32L SOP
0~70 C
CS18LV10245
-40~85 C
o
o
10uA
4.5~5.5
15uA
55/ 70
32L STSOP 1
32L TSOP 1
32L TSOP 2
32L PDIP
Dice
2
Rev. 1.3
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
128K Word By 8 Bit
CS18LV10245
PIN CONFIGURATIONS
FUNCTIONAL BLOCK DIAGRAM
3
Rev. 1.3
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
128K Word By 8 Bit
CS18LV10245
Function
PIN DESCRIPTIONS
Type
Name
A0 – A16
Input
Address inputs for selecting one of the 131,072 x 8 bit words in the RAM
/CE1 is active LOW and CE2 is active HIGH. Both chip enables must be
active when data read from or write to the device. If either chip enable is
/CE1, CE2
Input
not active, the device is deselected and in a standby power down mode.
The DQ pins will be in high impedance state when the device is
deselected.
The Write enable input is active LOW. It controls read and write
/WE
Input
operations. With the chip selected, when /WE is HIGH and /OE is LOW,
output data will be present on the DQ pins, when /WE is LOW, the data
present on the DQ pins will be written into the selected memory location.
The output enable input is active LOW. If the output enable is active
/OE
Input
while the chip is selected and the write enable is inactive, data will be
present on the DQ pins and they will be enabled. The DQ pins will be in
the high impedance state when /OE is inactive.
DQ0~DQ7
Vcc
Gnd
NC
I/O
Power
Power
These 8 bi-directional ports are used to read data from or write data into
the RAM.
Power Supply
Ground
No connection
TRUTH TABLE
MODE
Standby
Output
Disable
Read
Write
/CE1
H
X
L
L
L
CE2
X
L
H
H
H
/WE
X
X
H
H
L
/OE
X
X
H
L
X
High Z
D
OUT
D
IN
I
CC
I
CC
I
CC
DQ0~7
High Z
Vcc Current
I
CCSB
, I
CCSB1
4
Rev. 1.3
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
128K Word By 8 Bit
CS18LV10245
Rating
-0.5 to Vcc+0.5
-40 to +125
-60 to +150
1.0
20
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
V
TERM
T
BIAS
T
STG
P
T
I
OUT
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Unit
V
O
O
C
C
W
mA
1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage
to the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0~70 C
-40~85 C
o
o
Vcc
4.5~5.5V
4.5~5.5V
1. Overshoot: Vcc +2.0V in case of pulse width
≦20ns.
2. Undershoot: - 2.0V in case of pulse width
≦20ns.
3. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
(1)
(TA = 25
o
C, f =1.0 MHz)
Symbol
C
IN
C
DQ
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
=0V
V
I/O
=0V
MAX.
6
8
Unit
pF
pF
1. This parameter is guaranteed and not tested.
5
Rev. 1.3
Chiplus reserves the right to change product or specification without notice.
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