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GAL22V10-15LNC

Description
GENERIC ARRAY LOGIC
CategoryProgrammable logic devices    Programmable logic   
File Size489KB,13 Pages
ManufacturerNational Semiconductor(TI )
Websitehttp://www.ti.com
Stay tuned Parametric

GAL22V10-15LNC Overview

GENERIC ARRAY LOGIC

GAL22V10-15LNC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNational Semiconductor(TI )
package instructionDIP, DIP24,.3
Reach Compliance Codeunknow
Is SamacsysN
Other features10 MACROCELLS; SHARED INPUT/CLOCK; REGISTER PRELOAD
ArchitecturePAL-TYPE
maximum clock frequency45.5 MHz
JESD-30 codeR-PDIP-T24
JESD-609 codee0
length31.915 mm
Dedicated input times11
Number of I/O lines10
Number of entries22
Output times10
Number of product terms132
Number of terminals24
Maximum operating temperature75 °C
Minimum operating temperature
organize11 DEDICATED INPUTS, 10 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeEE PLD
propagation delay15 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Base Number Matches1
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