APL5501/2/3
Low I
Q
, Low Dropout 500mA Fixed Voltage Regulator
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low Noise : 50µV
RMS
(100Hz to 100kHz)
Low Quiescent Current : 50µA (No load)
Low Dropout Voltage : 170mV (@500mA)
Very Low Shutdown Current : < 0.5µA
Fixed Output Voltage : 1.3V ~ 3.4V
Stable with 4.7µF Output Capacitor
Stable with Aluminum, Tantalum, or Ceramic
Capacitors
Reverse Current Protection
No Protection Diodes Needed
Built-In Thermal Protection
Built-In Current-Limit Protection
Controlled Short Circuit Current : 150mA
Fast Transient Response
Short Setting Time
SOT-23-5, SOT-89, SOT-89-5, SOT-223, SOP-8
TO-252-3, and TO-252-5 Packages
Lead Free and Green Devices Available
(RoHS Compliant)
General Description
The APL5501/2/3 are micropower, low noise, low drop-
out linear regulators. Operate from 2.7V to 6V input volt-
age and deliver up to 500mA. Typical output noise is just
50µV
RMS
with the addition of an external 0.1µF bypass ca-
pacitor in BP pin and typical dropout voltage is only 170mV
at 500mA loading. Designed for use in battery-powered
system, the low 50µA quiescent current makes it an ideal
choice.
Design with an internal P-channel MOSFET pass
transistor, the APL5501/2/3 maintain a low supply current,
independent of the load current and dropout voltage. Other
features include reverse current protection, thermal-shut-
down protection, and current-limit protection to ensure
specified output current and controlled short-circuit
current. The APL5501/2/3 regulators come in a miniature
SOT-23-5, SOT-89, SOT-89-5, SOT-223, SOP-8, TO-252-
3, and TO-252-5 packages.
Applications
•
•
•
Notebook Computer
PDA or Portable Equipments
Noise-Sensitive Instrumentation Systems
Pin Configuration
APL5501
TAB is GND
BP
GND
SHDN
IN
1
2
3
4
8
7
6
5
OUT
GND
GND
2
3
4
BP
GND
BYP
SHDN
V
IN
1
5
V
OUT
5
1
2
3
4
2
3
GND
GND
SHDN
1
V
IN
GND
V
OUT
V
OUT
GND
V
IN
SOT-89 (Top View)
SOT-89-5 (Top View)
SOP-8 (Top View)
SOT-23-5 (Top View)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright
©
ANPEC Electronics Corp.
Rev. B.4 - Jan., 2009
1
www.anpec.com.tw
APL5501/2/3
Pin Configuration (Cont.)
APL5501
GND
TAB is GND
TAB is GND
1
2
3
1 2 3 4 5
1
2
3
V
IN
V
OUT
V
IN
GND
V
OUT
TO-252-3 (Top View)
TO-252-5 (Top View)
V
OUT
BP
GND
SHDN
V
IN
SOT-223 (Top View)
APL5502
TAB is VIN
APL5503
TAB is VIN
TAB is GND
1
2
3
1
GND
V
IN
V
OUT
2
3
1
2
3
GND
V
IN
V
OUT
V
OUT
GND
V
IN
SOT-89 (Top View)
SOT-223 (Top View)
SOT-223 (Top View)
Ordering and Marking Information
APL5501/2/3
Assembly Material
Handling Code
Temperature Range
Package Code
Voltage Code
Package Code
B : SOT-23-5 D : SOT-89
D5 : SOT-89-5
U : TO-252-3 U5 : TO-252-5 V : SOT-223
K : SOP-8
Operating Ambient Temperature Range
C : 0 to 70
o
C
Handling Code
TR : Tape & Reel
Voltage Code :
13 : 1.3V ~ 34 : 3.4V
Assembly Material
G : Halogen and Lead Free Device
XXXXX - Date Code , 13 - 1.3V
APL5501/2/3 - 13 D/V/K :
APL5501/2/3
XXXXX13
13
APL5501/2/3
XXXXX
APL5501/2/3 - 13 U :
XXXXX - Date Code , 13 - 1.3V
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Copyright
©
ANPEC Electronics Corp.
Rev. B.4 - Jan., 2009
2
www.anpec.com.tw
APL5501/2/3
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature, V
IN
=3.6V, C
IN
=1µF, C
OUT
=4.7µF, SHDN=V
IN
, T
J
=0 to 125°C.
Typical values refer to T
J
=25°C.
APL5501/2/3
Min.
V
IN
V
OUT
I
LIMIT
I
SHORT
I
OUT
REG
LINE
REG
LOAD
Input Voltage
Output Voltage
Circuit Current Limit
Short Current
Load Current
Line Regulation
Load Regulation
V
OUT
+0.5V< V
CC
<6.0V, I
OUT
= 1mA
V
IN
=V
OUT
+1.0V,
0mA< I
OUT
< I
MAX
1.3V≤V
OUT
<1.5V
1.3V<-V
OUT
<1.5V
V
DROP
Dropout Voltage
(Note 1)
I
OUT
=500mA
1.5V≤V
OUT
<2V
2V≤V
OUT
<2.5V
2.5V≤V
OUT
<3.4V
PSRR
I
Q
Ripple Rejection
Quiescent Current
I
OUT
=500mA
Shutdown Supply Current
(Note 2)
Symbol
Parameter
Test Conditions
2.7
V
OUT
+1.0V< V
CC
<6.0V, 0mA< I
OUT
< I
MAX
V
IN
=4.3V
V
OUT
=0V
Unit
Max.
6
V
V
A
mA
mA
mV
mV
%
mV
Typ.
-
V
OUT
0.7
200
-
4
1
0.1
1100
900
500
280
65
50
370
0.01
V
OUT
-2%
-
-
500
-
-
-
-
-
-
55
-
-
-
V
OUT
+2%
-
-
-
10
6
1300
1050
700
380
-
100
450
1
F≤1kHz, 1Vpp at V
IN
= V
OUT
+1.0V
C
OUT
=10nf
No load
dB
µA
Shutdown = low
I
OUT
=0, V
CC
=6.0V
100Hz<f<100kHz, typical load, C
BP
=0.01µF,
C
OUT
= 1µF
100Hz<f<100kHz, typical load, C
BP
=0.1µF,
C
OUT
= 1µF
µA
µVrms
-
-
-
-
-
50
40
7
70
150
-
-
-
-
-
Noise
(Note2)
Shutdown Recovery Delay C
BP
=0.01µF,C
OUT
=1µF, no load
(Note 2)
C
BP
=0.1µF,C
OUT
=1µF, no load
OTS
Over Temperature
Shutdown
Over Temperature
Shutdown Hysteresis
Hysteresis
ms
°C
-
10
-
°C
TC
Output Voltage
Temperature Coefficient
Output Capacitor
ESR
Shutdown Input
Threshold
(Note 2)
V
OUT
+1.0V< V
IN
<6.0V
-
50
-
ppm/
°C
µF
Ohm
V
C
OUT
4.2
0.02
0.4
4.7
0.1
0.7
5.2
1
1.6
Copyright
©
ANPEC Electronics Corp.
Rev. B.4 - Jan., 2009
4
www.anpec.com.tw
FPGA/CPLD
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