EC2500TS-10.000M TR
EC25 00
Series
Quartz Crystal Clock Oscillators XO (SPXO)
HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 5.0mm x 7.0mm
Ceramic Surface Mount (SMD)
Frequency Tolerance/Stability
±100ppm Maximum
Operating Temperature Range
-10°C to +70°C
Duty Cycle
50 ±10(%)
TS
-10.000M TR
Packaging Options
Tape & Reel
Nominal Frequency
10.000MHz
Load Drive Capability
Low Drive
Pin 1 Connection
Tri-State (High Impedance)
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
10.000MHz
±100ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Ouput Load Change, First Year Aging at 25°C,
Shock, and Vibration)
±5ppm/year Maximum
-10°C to +70°C
5.0Vdc ±10%
10mA Maximum (No Load)
2.4Vdc Minimum with (LS)TTL Load, Vdd-0.5Vdc Minimum with CMOS Load
-4mA
0.4Vdc Maximum with (LS)TTL Load, 0.5Vdc Maximum with CMOS Load
4mA
10nSec Maximum (Measured at 0.4Vdc to 2.4Vdc with (LS)TTL Load; Measured at 10% to 90% of
waveform with CMOS Load)
50 ±10(%) (Measured at 50% of waveform with CMOS Load or at 1.4Vdc with (LS)TTL Load)
Low Drive (10LSTTL Load or 30pF CMOS Load Maximum)
CMOS
Tri-State (High Impedance)
+2.0Vdc Minimum to enable output, +0.8Vdc Maximum to disable output (High Impedance), No Connect to
enable output.
1pSec Maximum (12kHz to 20MHz offset frequency)
10mSec Maximum
-55°C to +125°C
Aging at 25°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Input Current Logic High (Ioh)
Output Voltage Logic Low (Vol)
Input Current Logic Low (Iol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Pin 1 Connection
Tri-State Input Voltage (Vih and Vil)
RMS Phase Jitter
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Fine Leak Test
Flammability
Gross Leak Test
Mechanical Shock
Moisture Resistance
Moisture Sensitivity
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
Vibration
MIL-STD-883, Method 3015, Class 1, HBM: 1500V
MIL-STD-883, Method 1014, Condition A
UL94-V0
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 1004
J-STD-020, MSL 1
MIL-STD-202, Method 210, Condition K
MIL-STD-202, Method 215
MIL-STD-883, Method 2003
MIL-STD-883, Method 1010, Condition B
MIL-STD-883, Method 2007, Condition A
www.ecliptek.com | Specification Subject to Change Without Notice | Revision P 06/13/2012 | Page 1 of 8
EC2500TS-10.000M TR
Test Circuit for TTL Output
Output Load
Drive Capability
10TTL
5TTL
2TTL
10LSTTL
1TTL
R
L
Value
(Ohms)
390
780
1100
2000
2200
C
L
Value
(pF)
15
15
6
15
3
Oscilloscope
Frequency
Counter
Table 1: R
L
Resistance Value and C
L
Capacitance
Value Vs. Output Load Drive Capability
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
R
L
(Note 4)
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
+
0.01µF
(Note 1)
0.1µF
(Note 1)
C
L
(Note 3)
Power
Supply
_
Ground
No Connect
or Tri-State
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
Note 4: Resistance value R
L
is shown in Table 1. See applicable specification sheet for 'Load Drive Capability'.
Note 5: All diodes are MMBD7000, MMBD914, or equivalent.
www.ecliptek.com | Specification Subject to Change Without Notice | Revision P 06/13/2012 | Page 4 of 8
EC2500TS-10.000M TR
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
0.01µF
(Note 1)
0.1µF
(Note 1)
Ground
C
L
(Note 3)
No Connect
or Tri-State
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
www.ecliptek.com | Specification Subject to Change Without Notice | Revision P 06/13/2012 | Page 5 of 8
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