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AS7C331MNTD18A-166TQIN

Description
ZBT SRAM, 1MX18, 3.4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100
Categorystorage    storage   
File Size424KB,18 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Environmental Compliance  
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AS7C331MNTD18A-166TQIN Overview

ZBT SRAM, 1MX18, 3.4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100

AS7C331MNTD18A-166TQIN Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIntegrated Silicon Solution ( ISSI )
Parts packaging codeQFP
package instructionLQFP,
Contacts100
Reach Compliance Codecompli
ECCN code3A991.B.2.A
Maximum access time3.4 ns
Other featuresPIPELINED ARCHITECTURE
JESD-30 codeR-PQFP-G100
JESD-609 codee3
length20 mm
memory density18874368 bi
Memory IC TypeZBT SRAM
memory width18
Number of functions1
Number of terminals100
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize1MX18
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Package shapeRECTANGULAR
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)245
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width14 mm
December 2004
®
AS7C331MNTD18A
3.3V 1M x 18 Pipelined SRAM with NTD
TM
Features
Organization: 1,048,576 words × 18 bits
NTD
architecture for efficient bus operation
Fast clock speeds to 166 MHz
Fast clock to data access: 3.4/3.8 ns
Fast OE access time: 3.4/3.8 ns
Fully synchronous operation
Asynchronous output enable control
Available in 100-pin TQFP package
Individual byte write and global write
Clock enable for operation hold
Multiple chip enables for easy expansion
3.3V core power supply
2.5V or 3.3V I/O operation with separate V
DDQ
Self-timed write cycles
Interleaved or linear burst modes
Snooze mode for standby operation
Logic block diagram
A[19:0]
20
D
Address
register
burst logic
Q
20
CLK
CE0
CE1
CE2
R/W
BWa
BWb
ADV / LD
LBO
ZZ
18
CLK
D
Q
20
Write delay
addr. registers
CLK
Control
logic
CLK
Write Buffer
1M x 18
SRAM
array
DQ [a,b]
D
Data
Q
input
register
CLK
18
18
18
18
CLK
CEN
CLK
OE
Output
register
18
OE
DQ [a,b]
Selection guide
-166
Minimum cycle time
Maximum clock frequency
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
6
166
3.4
290
90
60
-133
7.5
133
3.8
270
80
60
Units
ns
MHz
ns
mA
mA
mA
12/24/04, v 2.7
Alliance Semiconductor
P. 1 of 18
Copyright © Alliance Semiconductor. All rights reserved.

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Description ZBT SRAM, 1MX18, 3.4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100 ZBT SRAM, 1MX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100 ZBT SRAM, 1MX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100 ZBT SRAM, 1MX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100 ZBT SRAM, 1MX18, 3.4ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100 ZBT SRAM, 1MX18, 3.4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100 ZBT SRAM, 1MX18, 3.4ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100 ZBT SRAM, 1MX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
Is it lead-free? Lead free Lead free Contains lead Lead free Contains lead Lead free Contains lead Contains lead
Is it Rohs certified? conform to conform to incompatible conform to incompatible conform to incompatible incompatible
Parts packaging code QFP QFP QFP QFP QFP QFP QFP QFP
package instruction LQFP, LQFP, LQFP, LQFP, LQFP, LQFP, LQFP, LQFP,
Contacts 100 100 100 100 100 100 100 100
Reach Compliance Code compli compliant compliant compliant compliant compliant compliant compli
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 3.4 ns 3.8 ns 3.8 ns 3.8 ns 3.4 ns 3.4 ns 3.4 ns 3.8 ns
Other features PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE
JESD-30 code R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100
JESD-609 code e3 e3 e0 e3 e0 e3 e0 e0
length 20 mm 20 mm 20 mm 20 mm 20 mm 20 mm 20 mm 20 mm
memory density 18874368 bi 18874368 bit 18874368 bit 18874368 bit 18874368 bit 18874368 bit 18874368 bit 18874368 bi
Memory IC Type ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM
memory width 18 18 18 18 18 18 18 18
Number of functions 1 1 1 1 1 1 1 1
Number of terminals 100 100 100 100 100 100 100 100
word count 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000 1000000 1000000 1000000 1000000 1000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 70 °C 70 °C 70 °C 70 °C 85 °C 85 °C
organize 1MX18 1MX18 1MX18 1MX18 1MX18 1MX18 1MX18 1MX18
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP LQFP LQFP LQFP LQFP LQFP LQFP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 245 245 NOT SPECIFIED 245 NOT SPECIFIED 245 NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.6 mm 1.6 mm 1.6 mm 1.6 mm 1.6 mm 1.6 mm 1.6 mm 1.6 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL
Terminal surface MATTE TIN MATTE TIN TIN LEAD MATTE TIN TIN LEAD MATTE TIN TIN LEAD TIN LEAD
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Terminal location QUAD QUAD QUAD QUAD QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 30 30 NOT SPECIFIED 30 NOT SPECIFIED 30 NOT SPECIFIED NOT SPECIFIED
width 14 mm 14 mm 14 mm 14 mm 14 mm 14 mm 14 mm 14 mm
Maker Integrated Silicon Solution ( ISSI ) - - - Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
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