M39003/10-2556S datasheet, PDF

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M39003/10-2556S: DescriptionTantalum Capacitor, Polarized, Tantalum (dry/solid), 50V, 10% +Tol, 10% -Tol, 33uF, Through Hole Mount, AXIAL LEADED; CategoryPassive components capacitor; File Size630KB，86 Pages; ManufacturerKEMET; Websitehttp://www.kemet.com

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M39003/10-2556S Overview

Tantalum Capacitor, Polarized, Tantalum (dry/solid), 50V, 10% +Tol, 10% -Tol, 33uF, Through Hole Mount, AXIAL LEADED

M39003/10-2556S Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	KEMET
package instruction	,
Reach Compliance Code	_compli
ECCN code	EAR99
capacitance	33 µF
Capacitor type	TANTALUM CAPACITOR
diameter	8.92 mm
dielectric materials	TANTALUM (DRY/SOLID)
ESR	180 mΩ
JESD-609 code	e0
leakage current	0.001 mA
length	19.96 mm
Installation features	THROUGH HOLE MOUNT
negative tolerance	10%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	TUBULAR PACKAGE
Package form	Axial
polarity	POLARIZED
positive tolerance	10%
Rated (DC) voltage (URdc)	50 V
Guideline	MIL-PRF-39003
surface mount	NO
Delta tangent	0.06
Terminal surface	Tin/Lead (Sn/Pb) - with Nickel (Ni) barrie
Terminal shape	WIRE

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ACEX 1K

Programmable Logic Device Family

Data Sheet

May 2001, ver. 3.0

Features...

Programmable logic devices (PLDs), providing low cost

system-on-a-programmable-chip (SOPC) integration in a single

device

– Enhanced embedded array for implementing megafunctions

such as efficient memory and specialized logic functions

– Dual-port capability with up to 16-bit width per embedded array

block (EAB)

– Logic array for general logic functions

High density

– 10,000 to 100,000 typical gates (see

Table 1)

– Up to 49,152 RAM bits (4,096 bits per EAB, all of which can be

used without reducing logic capacity)

Cost-efficient programmable architecture for high-volume

applications

– Cost-optimized process

– Low cost solution for high-performance communications

applications

System-level features

– MultiVolt

I/O pins can drive or be driven by 2.5-V, 3.3-V, or

5.0-V devices

–

Low power consumption

–

Bidirectional I/O performance (setup time [t

] and clock-to-

output delay [t

]) up to 250 MHz

– Fully compliant with the peripheral component interconnect

Special Interest Group (PCI SIG)

PCI Local Bus Specification,

Revision 2.2

for 3.3-V operation at 33 MHz or 66 MHz

Table 1. ACEX

1K Device Features

Feature

Typical gates

Maximum system gates

Logic elements (LEs)

EABs

Total RAM bits

Maximum user I/O pins

EP1K10

10,000

56,000

576

12,288

136

EP1K30

30,000

119,000

1,728

24,576

171

EP1K50

50,000

199,000

2,880

40,960

249

EP1K100

100,000

257,000

4,992

49,152

333

Altera Corporation

A-DS-ACEX-03.0

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