GT24C512A
Advanced
GT24C512A
2-WIRE
512K Bits
Serial EEPROM
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notice. Giantec products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for critical medical or surgical equipment,
aerospace or military, or other applications planned to support or sustain life. It is the customer's obligation to optimize the design in their own products for the best performance
and optimization on the functionality and etc. Giantec assumes no liability arising out of the application or use of any information, products or services described herein. Customers
are advised to obtain the latest version of this device specification before relying on any published information and prior placing orders for products.
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GT24C512A
Table of Contents
Features
.....................................................................................................................................................................
3
General Description
.............................................................................................................................................
3
Functional Block Diagram
................................................................................................................................
4
Pin Configuration...................................................................................................................................................
5
4.1 8-Pin SOIC and TSSOP ....................................................................................................................... 5
4.2 8-Lead UDFN ....................................................................................................................................... 5
4.3 Pin Definition ........................................................................................................................................ 5
4.4 Pin Descriptions ................................................................................................................................... 5
5. Device Operation
...................................................................................................................................................
6
5.1 2-WIRE Bus ......................................................................................................................................... 6
5.2 The Bus Protocol .................................................................................................................................. 6
5.3 Start Condition...................................................................................................................................... 6
5.4 Stop Condition ...................................................................................................................................... 6
5.5 Acknowledge ........................................................................................................................................ 6
5.6 Reset .................................................................................................................................................... 6
5.7 Standby Mode ...................................................................................................................................... 6
5.8 Device Addressing ............................................................................................................................... 6
5.9 Write Operation .................................................................................................................................... 7
5.10 Read Operation .................................................................................................................................. 8
5.11 Diagrams ............................................................................................................................................ 9
5.12 Timing Diagrams .............................................................................................................................. 12
6. Electrical Characteristics
..............................................................................................................................
13
6.1 Absolute Maximum Ratings ................................................................................................................ 13
6.2 Operating Range ................................................................................................................................ 13
6.3 Capacitance ....................................................................................................................................... 13
6.4 DC Electrical Characteristic ............................................................................................................... 14
6.5 AC Electrical Characteristic ................................................................................................................ 15
7. Ordering Information
.........................................................................................................................................
16
8. Top Markings
.........................................................................................................................................................
17
8.1 SOIC Package ................................................................................................................................... 17
8.2 TSSOP Package ................................................................................................................................ 17
8.3 UDFN Package .................................................................................................................................. 17
9. Package Information
.........................................................................................................................................
18
9.1 SOIC .................................................................................................................................................. 18
9.2 TSSOP ............................................................................................................................................... 19
9.3 UDFN ................................................................................................................................................. 20
10. Revision History
................................................................................................................................................
21
1.
2.
3.
4.
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GT24C512A
1. Features
•
•
•
•
•
•
•
•
•
Two-Wire Serial Interface, I
2
C
TM
Compatible
•
Page write mode
–
–
Bi-directional data transfer protocol
V
CC
= 1.7V to 5.5V
•
•
•
Wide-voltage Operation
Speed: 400 KHz (1.7V) and 1 MHz (2.5V~5.5V)
Standby current (max.): 1
μA,
1.7V
Operating current (max.): 0.5 mA, 1.7V
Hardware Data Protection
–
–
Up to 128 bytes per page write
Offer an 128-bytes additional Identification
page
Self timed write cycle with auto clear: 5ms (max.)
Filtered inputs for noise suppression
High-reliability
–
Write Protect Pin
•
•
•
–
–
Endurance: 1 million cycles
Data retention: 100 years
Sequential & Random Read Features
Memory organization: 65,536 x 8 bits
Page Size: 128 bytes
Industrial temperature grades
Packages: SOIC, TSSOP, UDFN and CSP
Lead-free, RoHS, Halogen free, Green
2. General Description
The GT24C512A are EEPROM devices that use the
industrial standard 2-wire interface for communications. The
GT24C512A contains a memory array of 512K-bits
(65,536x8), which is organized in 128-byte per page.
The EEPROM can operate in a wide voltage range from
1.7V to 5.5V which fits most application. This product can
provide a low-power 2-wire EEPROM solution. The device
is offered in Lead-free, RoHS, halogen free or Green. The
available package types are 8-pin SOIC, TSSOP, DFN and
CSP.
The GT24C512A is compatible with the industrial standard
2-wire bus protocol. If in case the bus is not responded, a
new sent Op-code command will reset the bus and the
device will respond correctly. The simple bus consists of the
Serial Clock wire (SCL) and the Serial Data wire (SDA).
Utilizing such bus protocol, a Master device, such as a
microcontroller, can usually control one or more Slave
devices, alike this GT24C512A. The bit stream over the
SDA line includes a series of bytes, which identifies a
particular Slave device, an instruction, an address within
that Slave device, and a series of data, if appropriate. The
GT24C512A also has a Write Protect pin (WP) to allow
blocking any write operations over specified memory area.
The GT24C512A also offers an additional page, named the
s
Identification Page (128 bytes) which can be written and
(later) permanently locked in Read-only mode. This
Identification Page offers flexibility in the application board
production line, as the Identification Page can be used to
store unique identification parameters and/or parameters
specific to the production line.
Under no circumstance, the device will be hung up. In order
to refrain the state machine entering into a wrong state
during power-up sequence or a power toggle off-on
condition, a power on reset circuit is embedded. During
power-up, the device does not respond to any instructions
until the supply voltage (V
CC
) has reached an acceptable
stable level above the reset threshold voltage. Once V
CC
passes the power on reset threshold, the device is reset
and enters into the Standby mode. This would also avoid
any inadvertent Write operations during power-up stage.
During power-down process, the device will enter into
standby mode, once V
CC
drops below the power on reset
threshold voltage. In addition, the device will be in standby
mode after receiving the Stop command, provided that no
internal write operation is in progress. Nevertheless, it is
illegal to send a command unless the V
CC
is within its
operating level.
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GT24C512A
3. Functional Block Diagram
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GT24C512A
4. Pin Configuration
4.1 8-Pin SOIC and TSSOP
Top View
4.2 8-Lead UDFN
Top View
A0
A1
A2
GND
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
4.3 Pin Definition
Pin No.
1
2
3
4
5
6
7
8
Pin Name
A0
A1
A2
GND
SDA
SCL
WP
V
CC
I/O
I
I
I
-
I/O
I
I
-
Device Address Input
Device Address Input
Device Address Input
Ground
Serial Address and Data input and Data out put
Serial Clock Input
Write Protect Input
Power Supply
Definition
4.4 Pin Descriptions
SCL
This input clock pin is used to synchronize the data transfer
to and from the device.
SDA
The SDA is a bi-directional pin used to transfer addresses
and data into and out of the device. The SDA pin is an open
drain output and can be wired with other open drain or open
collector outputs. However, the SDA pin requires a pull-up
resistor connected to the power supply.
A0, A1, A2
The A0, A1 and A2 are the device address inputs.
Typically, the A0, A1, and A2 pins are for hardware
addressing and a total of 8 devices can be connected on a
single bus system. When A0, A1, and A2 are left floating,
the inputs are defaulted to zero.
WP
WP is the Write Protect pin. While the WP pin is connected
to the power supply of GT24C512A, the entire array
becomes Write Protected (i.e. the device becomes Read
only). When WP is tied to Ground or left floating, the normal
write operations are allowed.
V
CC
Supply voltage
GND
Ground of supply voltage
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