RT9470/D
3A Single Cell Switching Battery Charger
General Description
The RT9470/D device are a highly-integrated 3A switch
mode battery charge management and system power
path management device for single cell Li-Ion and
Li-polymer battery. The low impedance power path
optimizes switch-mode operation efficiency, reduces
battery charging time and extends battery life during
discharging phase. The I
2
C serial interface with
charging and system settings makes the device a truly
flexible solution.
Features
Applications
Smart Phone/Tablet PC
Personal Information Appliances
Portable Device and Accessory
Ordering Information
RT9470/D
Package Type
WSC : WL-CSP-30B 2.1x2.5 (BSC)
BC1.2 Detection
Default : Not Support
D : Support
Note :
Richtek products are :
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering
processes.
High Efficiency, 1.5MHz, Synchronous
Switch-Mode Buck Charger
92% Charge Efficiency at 2A from 5V Input and
3.8V Battery
Support 3.9V to 13.5V Input Voltage Range
Average Input Current Regulation (AICR)
Minimum Input Voltage Regulation (MIVR)
Minimum Input Voltage Regulation Track (MIVR
Track)
Charge Current Regulation (CCR)
Charge Voltage Regulation (CVR)
Charge Voltage Regulation Track (CVR Track)
Junction Thermal Regulation (JTR)
Supports USB On-The-Go (OTG)
92% Boost Efficiency at 1A with 3.8V Battery
and 5.15V Output
OTG Current Limit Regulation (OCLR)
OTG Voltage Limit Regulation (OVLR)
Protection
Over-Temperature Protection (OTP)
VBUS Over-Voltage Protection (VBUS OVP)
Battery Over-Voltage Protection (VBAT OVP)
System Over-Voltage Protection (VSYS OVP)
System Under-Voltage Protection (VSYS UVP)
System Over-Load Protection (VSYS OLP)
Cycle-by-Cycle Over-Current Protection (OCP)
OTG Low Battery Protection (OTG LBP)
Simplified Application Circuit
RT9470/D
USB
VAC
VBUS
PMID
SYS
BAT
QON
REGN
I C BUS
Host
Host control
TS
Battery
Pack
2
BTST
C
BUS
C
BTST
SW
System
L
C
SYS
C
BAT
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS9470/D-01
August
2019
www.richtek.com
1
RT9470/D
Marking Information
RT9470WSC
1N : Product Code
YMDNN : Date Code
RT9470DWSC
1P : Product Code
YMDNN : Date Code
1N YM
DNN
1P YM
DNN
Pin Configuration
(TOP VIEW)
A1
GND
B1
GND
C1
BAT
D1
BAT
E1
BAT
F1
BAT
A2
SW
B2
SW
C2
SYS
D2
SYS
E2
SYS
F2
SYS
A3
PMID
B3
PMID
C3
BTST
D3
TS
E3
CE
F3
BATSNS
A4
VBUS
B4
VBUS
C4
REGN
D4
QON
E4
SDA
F4
INT
A5
VAC
B5
NC
C5
PSEL
D5
PG
E5
STAT
F5
SCL
A1
GND
B1
GND
C1
BAT
D1
BAT
E1
BAT
F1
BAT
A2
SW
B2
SW
C2
SYS
D2
SYS
E2
SYS
F2
SYS
A3
PMID
B3
PMID
C3
BTST
D3
TS
E3
CE
F3
BATSNS
A4
VBUS
B4
VBUS
C4
REGN
D4
QON
E4
SDA
F4
INT
A5
VAC
B5
NC
C5
D+
D5
D-
E5
STAT
F5
SCL
WL-CSP-30B 2.1x2.5 (BSC) (RT9470)
WL-CSP-30B 2.1x2.5 (BSC) (RT9470D)
Functional Pin Description
Pin No.
RT9470
A1, B1
RT9470D
A1, B1
Pin Name
GND
I/O
P
Power ground.
Switching node connecting to output inductor. Internally
SW is connected to the source of the high-side switching
MOSFET (Q2) and the drain of the low-side switching
MOSFET (Q3). Connect a 47nF bootstrap capacitor from
SW to BTST.
Connected to the drain of the reverse blocking MOSFET
(Q1) and the drain of high-side switching MOSFET (Q2).
Connect 10F capacitor from PMID to GND.
Charger input voltage. The internal reverse block
MOSFET (Q1) is connected between VBUS and PMID
with VBUS on source. Connect a 1F capacitor from
VBUS to GND and place it as close as possible to IC.
Input voltage sensing. This pin must be tied to VBUS.
No internal connection.
Pin Function
A2, B2
A2, B2
SW
P
A3, B3
A3, B3
PMID
P
A4, B4
A4, B4
VBUS
P
A5
B5
A5
B5
VAC
NC
AI
--
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS9470/D-01
August 2019
RT9470/D
Pin No.
RT9470
RT9470D
Pin Name
I/O
Pin Function
Battery connection point to the positive terminal of the
battery pack. The internal current sensing resistor is
connected between SYS and BAT. Connect a 10F
capacitor closely to the BAT pin.
Converter output connection point. The internal current
sensing resistor is connected between SYS and BAT.
Connect two 10F capacitors closely to the SYS pin.
PWM high-side driver positive supply. Internally, the
BTST is connected to the cathode of the boost-strap
diode. Connect the 47nF bootstrap capacitor from SW to
BTST.
PWM low-side driver and internal supply output.
Internally, REGN is connected to the anode of the
bootstrap diode. Connect a 4.7F capacitor from REGN
to GND. The capacitor should be placed close to the IC.
Power source selection input. High indicates 0.5A input
current limit. Low indicates 2.4A input current limit. Once
the device gets into host mode, the host can program
different input current limit to AICR register.
C1, D1, E1, F1 C1, D1, E1, F1 BAT
P
C2, D2, E2, F2 C2, D2, E2, F2 SYS
P
C3
C3
BTST
P
C4
C4
REGN
P
C5
--
PSEL
DI
--
C5
D+
Positive line of the USB data line pair. D+/D– based USB
host/charging port detection. The detection includes data
AIO
contact detection (DCD), primary and secondary
detections in BC1.2.
Temperature qualification voltage input to support JEITA
profile. Connect a negative temperature coefficient
thermistor. Program temperature window with a resistor
divider from REGN to TS to GND. Charge suspends
when TS pin voltage is out of range. When TS pin is not
used, connect a 10k resistor from REGN to TS and a
10k resistor from TS to GND.
BATFET (Q4) enable control input. When BATFET is in
ship mode, a logic low duration turns on BATFET (Q4) to
exit shipping mode. When no VBUS, a logic low for
t
QON_RST
, the BATFET turns off for t
BATFET_RST
, and
then re-enable BATFET to provide system reset.
Pull-High to internal bias circuit via 250k resistor.
Open-drain active low power good indicator. Connect the
PG pin to a logic rail via 2.2k to 10k resistor.
D3
D3
TS
AI
D4
D4
QON
DI
D5
--
PG
DO
--
D5
D-
Negative line of the USB data line pair. D+/D– based
USB host/charging port detection. The detection includes
AIO
data contact detection (DCD), primary and secondary
detections in BC1.2.
DI
Charge enable pin. When this pin is driven low, battery
charging is enabled.
E3
E4
E3
E4
CE
SDA
I
2
C interface clock. Connect SDA to the logic rail through
DIO
a 10k resistor.
DO
Open-drain charger status output. Connect the STAT pin
to a logic rail via 2.2k to 10k resistor. The STAT pin
indicates charger status.
is a registered trademark of Richtek Technology Corporation.
E5
E5
STAT
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
DS9470/D-01
August
2019
www.richtek.com
3
RT9470/D
Pin No.
RT9470
F3
RT9470D
F3
Pin Name
I/O
Pin Function
Battery voltage sensing pin for charge current regulation.
The BATNS pin must be connected to the battery pack
as close as possible.
Open-drain active low interrupt output. Connect the INT
to a logic rail through 10k resistor. The INT pin sends
active low pulse to host to report charger device status
and fault.
I
2
C interface clock. Connect SCL to the logic rail through
a 10k resistor.
BATSNS
AI
F4
F4
INT
DO
F5
F5
SCL
DI
Functional Block Diagram
RT9470 Functional Block Diagram
Q1
VBUS
VAC
Sensing
PMID BAT
REGN
LDO
REGN
PMID
PSEL
Input
Source
Detection
Q1
Control
Power
Select
BTST
Q2
SDA
I C
Interface
SCL
2
Protection
Converter
Control
SW
REGN
Q3
INT
CE
Digital
Control
REGN
GND
SYS
STAT
Q4
JEITA
Control
Power Path
Control
Q4
Switching-
well Control
BAT
PG
TS Sensing
QON
VDDA
BATSNS
TS
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS9470/D-01
August 2019
RT9470/D
RT9470D Functional Block Diagram
Q1
VBUS
VAC
Sensing
PMID BAT
REGN
LDO
REGN
PMID
D+
D-
Input
Source
Detection
Q1
Control
Power
Select
BTST
Q2
SDA
I C
Interface
SCL
2
Protection
Converter
Control
SW
REGN
Q3
INT
CE
Digital
Control
REGN
GND
SYS
STAT
Q4
JEITA
Control
Power Path
Control
Q4
Switching-
well Control
BAT
VDDA
TS Sensing
QON
BATSNS
TS
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS9470/D-01
August
2019
www.richtek.com
5
京公网安备 11010802033920号
EEWORLD
