EEWORLDEEWORLDEEWORLD

Part Number

Search

30-105-042-1-T

Description
Board Connector, 42 Contact(s), 2 Row(s), Female, Straight, Solder Terminal,
CategoryThe connector    The connector   
File Size121KB,2 Pages
ManufacturerCristek Interconnects Inc
Download Datasheet Parametric View All

30-105-042-1-T Overview

Board Connector, 42 Contact(s), 2 Row(s), Female, Straight, Solder Terminal,

30-105-042-1-T Parametric

Parameter NameAttribute value
MakerCristek Interconnects Inc
Reach Compliance Codecompliant
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD (30)
Contact completed and terminatedGOLD (5)
Contact point genderFEMALE
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee4
MIL complianceNO
Mixed contactsNO
Installation methodSTRAIGHT
Installation typeBOARD
Number of rows loaded2
OptionsGENERAL PURPOSE
Terminal pitch3.81 mm
Termination typeSOLDER
Total number of contacts42
 3& %2$5' &211(&7256  0276
;
12 2) &217$&76



“
7<3

7<3

<
=
$

7$,/
/(1*7+
 “ 
32,17 2)
&217$&7

$
 (/(&75,&$/ *$3
326,7,9( 6723
6(&7,21 $$





67$1'2))




675$,*+7 7$,/ 237,216
&5,67(. ,17(5&211(&76 ,1&
ZZZFULVWHNFRP
 6 /HZLV 6W
$QDKHLP &$ 
3KRQH 



)$; 



7,7/(
&200(5&,$/ 02'7(.
'28%/( 52: %2;
5,*+7 $1*/( 9(57,&$/  3,7&+
),/(1$0(
$'6
':* 12

6+7
;;; “
&2'( ,'(17 12


2)

5(9
&
72/(5$1&(
;; “
$1*/( “ƒ

FPGA Timing Report Interpretation
I got the following timing report in the ISE synthesis tool: Minimum period: 6.761ns (Maximum Frequency: 147.913MHz) Minimum input arrival time before clock:3.383 Maximum output required time after cl...
nanaless44 Embedded System
Where do errors in vector network analyzers come from?
The error sources of vector network analyzers are mainly the following three aspects: drift error, random error, and systematic error.1. Drift error: It is caused by changes in the performance of the ...
博宇讯铭 Test/Measurement
Surgeon says monkey's head transplant is a success - replacing a human head is no longer a dream
According to a report by the British Daily Mail on January 20, Italian neurosurgeon Sergio Canavero claimed that Chinese researchers successfully "replaced the head" of a monkey, which took his human ...
凤凰息梧桐 Talking
[Repost] Detailed explanation of RT5350 original SDK and AP transplantation steps
[p=21, null, left][color=rgb(50, 62, 50)][backcolor=rgb(156, 174, 193)][font=simsun][size=14px]I recently wanted to play around with rt5350, so I found an original SDK package and compiled it. Soon th...
chenzhufly RF/Wirelessly
[Perf-V Evaluation] Environment Construction and Marquee Program Running
[i=s]This post was last edited by superstar_gu on 2021-1-29 16:04[/i]2.2.1 Setting up the Vivado hardware development environmentThe core processing chip of the Perf-V development board uses the Xilin...
superstar_gu FPGA/CPLD
Some suggestions on forum learning
After browsing the forum for a long time, I found a phenomenon that there are not many EE learning videos compared to some technical forums. I feel that this may be a weakness of our forum. I original...
wateras1 Suggestions & Announcements

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2323  554  1633  1336  2326  47  12  33  27  30 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号