Leaded Oscillator, OCXO
Metal Package, 27 mm X 36 mm
Frequency
Output Level
Level
Duty Cycle
Rise / Fall Time
Output Load
Supply Voltage
Current (Warm Up)
Current @ +25 C
Control Voltage (“V” option)
Slope
Temperature
Operating
Storage
Environmental
Package Information
1.000 MHz to 150.000 MHz
TTL
HC-MOS
‘0’= 0.4 VDC Max., ‘1’ = 2.4 VDC Min.
‘0’ = 0.1 Vcc Max., ‘1’= 4.5 VDC Min.
Specify 50%
10% or
5% See Table
10 nS Max. @ Fo < 16 MHz, 5 nS Max. @ Fo > 16 MHz
5 TTL
See Table
See Supply Voltage Table
500 mA @ 5 VDC, 350 mA @ 12 VDC Max.
250 mA @ 5 VDC, 120 mA @ 12 VDC Typ.
2.5 VDC
2.0 VDC,
8
ppm Min. for AT cut
Positive
See Operating Temperature Table
-40 C to +85 C
See Appendix B for information
MSL = N.A., Termination = e1
I405 Series
Sine
+4 dBm,
3 dBm
N.A.
N.A.
50 Ohms
Part Number Guide
Package
Input
Voltage
5 = 5.0V
9 = 12V
I405 -
3 = 3.3V
Operating
Temperature
7 = 0 C to +50 C
1 = 0 C to +70 C
6 = -10 C to +70 C
3 = -20 C to +70 C
Sample Part Number:
Symmetry
(Duty Cycle)
5 = 45 / 55 Max.
6 = 40 / 60 Max.
I405 - 5151YVA - 20.000 MHz
Output
Stability
(in ppm)
Y =
0.5
1 =
0.25
2 =
0.1
3 =
0.05
*
Voltage Control
V = Controled
F = Fixed
Crystal
Cut
A = AT
S = SC
- 20.000 MHz
Frequency
1 = 10TTL / 15 pF HC-MOS
3 = 15 pF HC-MOS
6 = 30 pF
A = Sine
5 =
0.015
*
NOTE: A 0.01 µF bypass capacitor is recommended between Vcc (pin 4) and Gnd (pin 2) to minimize power supply noise.
* - Not available for all temperature ranges.
12/10_A
ILSI America
Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com
Specifications subject to change without notice
FPGA/CPLD
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