I630-61FB9O2-225.000 datasheet, PDF

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I630-61FB9O2-225.000: DescriptionLVPECL Output Clock Oscillator,; CategoryPassive components oscillator; File Size48KB，3 Pages; ManufacturerILSI; Websitehttp://www.ilsiamerica.com; Environmental Compliance

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I630-61FB9O2-225.000 Overview

LVPECL Output Clock Oscillator,

I630-61FB9O2-225.000 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	ILSI
Reach Compliance Code	compli
Other features	COMPLIMENTARY OUTPUT; TR, 7 INCH
Maximum control voltage	2.5 V
Minimum control voltage
maximum descent time	0.6 ns
Frequency Adjustment - Mechanical	NO
Frequency offset/pull rate	50 ppm
frequency stability	20%
JESD-609 code	e4
linearity	10%
Installation features	SURFACE MOUNT
Nominal operating frequency	225 MHz
Maximum operating temperature	70 °C
Minimum operating temperature
Oscillator type	LVPECL
Output load	50 OHM
physical size	7.0mm x 5.0mm x 1.9mm
longest rise time	0.6 ns
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Gold (Au) - with Nickel (Ni) barrie

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5 mm x 7 mm Ceramic Package SMD VCXO, LVCMOS / LVPECL / LVDS

Product Features

Small Surface Mount Package

Fast Sample Delivery

Frequencies to 1500 MHz

Pb Free/ RoHS Compliant

Leadfree Processing

I630 - Series

Applications

xDSL

Broadcast video

Wireless Base Stations

Sonet /SDH

WiMAX/WLAN

Server and Storage

Ethernet/LAN/WAN

Optical modules

Clock and data recovery

FPGA/ASIC

Backplanes

GPON

5.0

0.2

Frequency

LVCMOS

LVPECL

LVDS

Output Level

LVCMOS

LVPECL

LVDS

Duty Cycle

LVCMOS

LVPECL

LVDS

Rise / Fall Time

LVCMOS

LVPECL

LVDS

Output Load

LVCMOS

LVPECL

LVDS

Frequency Stability

Supply Voltage

Current

Linearity

Pullability

Control Voltage

Input Impedance

Phase Jitter (RMS)

At 12kHz to 20 MHz

Operating Temp.

Range

Storage

7.0 0.3

10 MHz to 225 MHz

10 MHz to 1500 MHz

1.9 Max.

VOH=90% VDD min., VOL=10 % VDD max.

VOH=VDD-1.03V max. (Nom. Load), VOL=VDD-1.6V max. (Nom. Load)

VOD=(Diff. Output) 350mV Typ.

50% ±5% @ 50%VDD

50% ±5% @ 50%*

3.0 ns max. (90%/10%)*

0.6 ns max. (80%/20%)*

Recommended Pad Layout

5.08

15pF



to VDD - 2.0 VDC

RL=100

/CL=10pF

See Table Below

3.3 VDC ± 10%, 2.5 VDC ± 5%

LVCMOS = 25 mA max., LVPECL = 60 mA max. LVDS = 35 mA max.

10% max.

See Table Below

1.65 VDC ± 1.65 VDC @ 3.3V

1.25 VDC ± 1.25 VDC @ 2.5V

50K



min.

0.9 ps typical

See Table Below

-40



C to +100



2.0

5.08

4.2

1.9

Pin Connection

Voltage Control

Enable/Disable or N/C

GND

Output

Output or N/C

Dimension Units: mm

Part Number Guide

Package

Input

Voltage

3 = 3.3V

6 = 2.5V

Sample Part Number:

Stability

(in ppm)

F =

20

A =

25

B =

50

I630–31AB9H2–155.520

Enable / Disable

(Pin 2)

K = Enable

O = N/C

Operating

Temperature

1 = 0 C to +70 C

3 = -20 C to +70 C

2 = -40 C to +85 C

Pullabilty

B =



C =

100

Output

3 = LVCMOS

8 = LVDS

9 = LVPECL

Complimentary

Ouput (Pin 5) **

1 = N.C.

2 = Output

Frequency

I630

-155.520 MHz

NOTE: A 0.01 µF bypass capacitor is recommended between V

(pin 6) and GND (pin 3) to minimize power supply noise. * Measured as percent of

waveform. ** Available on LVDS and LVPECL ouput only

ILSI

America

Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com

10/17/12_E

Specifications subject to change without notice

Page 1

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