UPSD3214BV-24T6F datasheet, PDF

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UPSD3214BV-24T6F: DescriptionRISC MICROCONTROLLER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，181 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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UPSD3214BV-24T6F Overview

RISC MICROCONTROLLER

UPSD3214BV-24T6F Parametric

Parameter Name	Attribute value
Maker	STMicroelectronics
package instruction	,
Reach Compliance Code	unknow
technology	CMOS
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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UPSD3212A

UPSD3212C, UPSD3212CV

Flash programmable system devices

with 8032 MCU and USB and programmable logic

Features

■

Fast 8-bit 8032 MCU

– 40 MHz at 5.0 V, 24 MHz at 3.3 V

– Core, 12-clocks per instruction

Dual Flash memories with memory

management

– Place either memory into 8032 program

address space or data address space

– Read-while-write operation for in-

application programming and EEPROM

emulation

– Single voltage program and erase

– 100 K minimum erase cycles, 15-year

retention

Clock, reset, and supply management

– Normal, idle, and power down modes

– Power-on and low voltage reset supervisor

– Programmable watchdog timer

LQFP52 (T)

52-lead, thin,

quad flat package

■

LQFP80 (U)

80-lead, thin, quad

flat package

■

Programmable logic, general-purpose

– 16 macrocells

– Implements state machines, glue-logic, etc.

Timers and interrupts

– Three 8032 standard 16-bit timers

– 10 Interrupt sources with two external

interrupt pins

A/D converter

– Four channels, 8-bit resolution, 10 µs

Device summary

■

Order code

Communication interfaces

– USB v1.1, low-speed 1.5 Mbps,

3 endpoints

– I

C master/slave bus controller

– Two UARTs with independent baud rate

– Six I/O ports with up to 46 I/O pins

– 8032 address/data bus available on

TQFP80 package

– 5 PWM outputs, 8-bit resolution

■

JTAG in-system programming

– Program the entire device in as little as

10 seconds

Single supply voltage

– 4.5 to 5.5 V

– 3.0 to 3.6 V

ECOPACK® packages

■

Table 1.

Max. clock 1st

2nd

8032

SRAM GPIO USB

(V)

(MHz)

Flash Flash

bus

64 KB 16 KB

2 KB

Yes

Pkg.

Temp.

UPSD3212C-40T6

UPSD3212CV-24T6

UPSD3212C-40U6

UPSD3212CV-24U6

UPSD3212A-40T6

UPSD3212A-40U6

4.5-5.5 TQFP52 –40°C to 85°C

3.0-3.6 TQFP52 –40°C to 85°C

4.5-5.5 TQFP80 –40°C to 85°C

3.0-3.6 TQFP80 –40°C to 85°C

4.5-5.5 TQFP52 –40°C to 85°C

4.5-5.5 TQFP80 –40°C to 85°C

January 2009

Rev 6

1/181

www.st.com

Contents

UPSD3212A, UPSD3212C, UPSD3212CV

Contents

UPSD321xx description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1

52-pin package I/O port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.1

2.2

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

2.2.6

2.2.7

Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

B register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Stack pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Program counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Program status word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Registers R0~R7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.3

2.4

2.5

2.6

2.7

2.8

Program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Data memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

XRAM-PSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Addressing modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.8.1

2.8.2

2.8.3

2.8.5

2.8.6

Direct addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Indirect addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Immediate constants addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Indexed addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.8.4

2.9

2.10

2.11

Arithmetic instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Logical instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Data transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.11.1

2.11.2

2.11.3

Internal RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

External RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Lookup tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2.12

2.13

2/181

Boolean instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Relative offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

UPSD3212A, UPSD3212C, UPSD3212CV

Contents

2.14

2.15

Jump instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Machine cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

UPSD321xx hardware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

MCU module description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.1

Special function registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Interrupt system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

5.1

5.2

5.3

5.4

5.5

5.6

5.7

5.8

5.9

5.10

External Int0 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Timer 0 and 1 interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Timer 2 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

C interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

External Int1 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

USB interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

USART interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Interrupt priority structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Interrupt enable structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

How interrupts are handled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Power-saving mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

6.1

6.2

6.3

Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Power control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

6.4

6.5

I/O ports (MCU module) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

7.1

Port type and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Supervisory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

9.1

9.2

External reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Low V

voltage reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

3/181

Contents

UPSD3212A, UPSD3212C, UPSD3212CV

9.3

9.4

Watchdog timer overflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

USB reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Timer/counters (Timer 0, Timer 1 and Timer 2) . . . . . . . . . . . . . . . . . . 58

11.1

Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

11.1.1

11.1.2

11.1.3

11.1.4

Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

11.2

Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Standard serial interface (UART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

12.1

12.2

Multiprocessor communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Serial port control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

12.2.1

12.2.2

12.2.3

12.2.4

12.2.5

12.2.6

Baud rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Using Timer 1 to generate baud rates . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Using Timer/counter 2 to generate baud rates . . . . . . . . . . . . . . . . . . . 67

More about Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Analog-to-digital convertor (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

13.1

More about Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

More about Modes 2 and 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

ADC interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Pulse width modulation (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

4-channel PWM unit (PWM 0-3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Programmable period 8-bit PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

PWM 4-channel operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

14.1

14.2

14.3

C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

15.1

15.2

15.3

Serial status register (SxSTA: S1STA, S2STA) . . . . . . . . . . . . . . . . . . . . 85

Data shift register (SxDAT: S1DAT, S2DAT) . . . . . . . . . . . . . . . . . . . . . . . 85

Address register (SxADR: S1ADR, S2ADR) . . . . . . . . . . . . . . . . . . . . . . 86

4/181

UPSD3212A, UPSD3212C, UPSD3212CV

Contents

USB hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

16.1

16.2

USB related registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

16.2.1

16.2.2

USB physical layer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Low speed driver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

16.3

16.4

Receiver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

External USB pull-up resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

PSD module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

17.1

17.2

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

In-system programming (ISP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Development system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

PSD module register description and address offset . . . . . . . . . . . . 103

PSD module detailed operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Memory blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

21.1

21.2

Primary Flash memory and secondary Flash memory description . . . . 105

Memory block select signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

21.2.1

21.2.2

Ready/Busy (PC3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Memory operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

21.3

21.4

21.4.1

21.5.1

21.5.2

21.5.3

21.5.4

21.5.5

21.5.6

21.5.7

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Power-up mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Power-down instruction and Power-up mode . . . . . . . . . . . . . . . . . . . . . 107

Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Read memory contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Read memory sector protection status . . . . . . . . . . . . . . . . . . . . . . . . 108

Reading the Erase/Program status bits . . . . . . . . . . . . . . . . . . . . . . . . 108

Data polling flag (DQ7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Toggle flag (DQ6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Error flag (DQ5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Erase time-out flag (DQ3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

21.5

21.6

Programming Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

21.6.1

Data Polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

5/181

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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