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PSoC 6 MCU: CY8C62x5 Datasheet
PSoC 62 MCU
General Description
PSoC
®
6 MCU is a high-performance, ultra-low-power and secure MCU platform, purpose-built for IoT applications. The CY8C62x5
product line, based on the PSoC 6 MCU platform, is a combination of a dual CPU microcontroller with low-power flash technology,
digital programmable logic, high-performance analog-to-digital conversion and standard communication and timing peripherals.
Features
32-bit Dual CPU Subsystem
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Segment LCD Drive
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150-MHz Arm
®
Cortex
®
-M4F (CM4) CPU with single-cycle
multiply, floating point, and memory protection unit (MPU)
100-MHz Cortex-M0+ (CM0+) CPU with single-cycle multiply
and MPU
User-selectable core logic operation at either 1.1 V or 0.9 V
Supports up to 63 segments and up to 8 commons.
Operates in system Deep Sleep mode
Seven run-time configurable serial communication blocks
(SCBs)
2
❐
Six SCBs: configurable as SPI, I C, or UART
2
❐
One Deep Sleep SCB: configurable as SPI or I C
USB Full-Speed device interface
One SD Host Controller/eMMC/SD controller
One CAN FD block
Twelve timer/counter/pulse-width modulators (TCPWMs)
Center-aligned, edge, and pseudo-random modes
Comparator-based triggering of Kill signals
12-bit 2-Msps SAR ADC with differential and single-ended
modes and 16-channel sequencer with result averaging
Two low-power comparators available in system Deep Sleep
and Hibernate modes
Built-in temperature sensor connected to ADC
Two Smart I/O™ ports (8 I/Os) enable Boolean operations on
GPIO pins; available during system Deep Sleep
Programmable drive modes, strengths, and slew rates
Two overvoltage-tolerant (OVT) pins
Cypress CapSense
®
sigma-delta (CSD) provides best-in-class
signal-to-noise ratio (SNR), liquid tolerance, and proximity
sensing
Enables dynamic usage of both self and mutual sensing
Automatic hardware tuning (SmartSense™)
Serial Communication
Active CPU current slope with 1.1-V core operation
❐
Cortex-M4: 40 µA/MHz
❐
Cortex-M0+: 20 µA/MHz
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Active CPU current slope with 0.9-V core operation
❐
Cortex-M4: 22 µA/MHz
❐
Cortex-M0+: 15 µA/MHz
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Three DMA controllers
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Timing and Pulse-Width Modulation
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Memory Subsystem
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512-KB application flash, 32-KB auxiliary flash (AUXflash), and
32-KB supervisory flash (SFlash); read-while-write (RWW)
support. Two 8-KB flash caches, one for each CPU.
256-KB SRAM with programmable power control and retention
granularity
One-time-programmable (OTP) 1-Kb eFuse array
Six power modes for fine-grained power management
Deep Sleep mode current of 7 µA with 64-KB SRAM retention
On-chip DC-DC buck converter, <1 µA quiescent current
Backup domain with 64 bytes of memory and real-time clock
On-chip crystal oscillators (16 to 35 MHz, and 32 kHz)
Phase-locked loop (PLL) for multiplying clock frequencies
8-MHz internal main oscillator (IMO) with ±2% accuracy
Ultra-low-power 32-kHz internal low-speed oscillator (ILO)
Frequency-locked loop (FLL) for multiplying IMO frequency
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Programmable Analog
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Low-Power 1.7-V to 3.6-V Operation
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Up to 64 Programmable GPIOs
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Flexible Clocking Options
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Capacitive Sensing
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Quad-SPI (QSPI)/Serial Memory Interface (SMIF)
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Execute-In-Place (XIP) from external quad SPI flash
On-the-fly encryption and decryption
4-KB cache for greater XIP performance with lower power
■
Supports single, dual, quad, dual-quad, and octal interfaces
with throughput up to 640 Mbps
Cypress Semiconductor Corporation
Document Number: 002-26168 Rev. *G
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised July 24, 2020
PSoC 6 MCU: CY8C62x5 Datasheet
Security Built into Platform Architecture
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Cryptography Accelerator
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ROM-based root of trust via uninterruptible Secure Boot
Authentication during boot using hardware hashing
Step-wise authentication of execution images
Secure execution of code in execute-only mode for protected
routines
All debug and test ingress paths can be disabled
Up to eight protection contexts
Hardware acceleration for symmetric and asymmetric
cryptographic methods and hash functions
True random number generation (TRNG) function
100 TQFP, 68 QFN, 49 WLCSP
Packages
■
Document Number: 002-26168 Rev. *G
Page 2 of 72
PSoC 6 MCU: CY8C62x5 Datasheet
Contents
Development Ecosystem ................................................. 4
PSoC 6 MCU Resources ............................................. 4
ModusToolbox™ IDE and the PSoC 6 SDK ............... 5
Blocks and Functionality ................................................. 6
Functional Description..................................................... 8
CPU and Memory Subsystem ..................................... 8
System Resources .................................................... 11
Programmable Analog Subsystems .......................... 13
Programmable Digital ................................................ 14
Fixed-Function Digital ................................................ 14
GPIO ......................................................................... 16
Special-Function Peripherals .................................... 17
Pinouts ............................................................................ 20
Power Supply Considerations....................................... 30
Electrical Specifications ................................................ 35
Absolute Maximum Ratings ....................................... 35
Device-Level Specifications ...................................... 35
Analog Peripherals .................................................... 43
Digital Peripherals ..................................................... 49
Memory ..................................................................... 52
System Resources .................................................... 53
Ordering Information...................................................... 62
PSoC 6 MPN Decoder .............................................. 63
Packaging........................................................................ 64
Acronyms ........................................................................ 67
Document Conventions ................................................. 69
Units of Measure ....................................................... 69
Errata ............................................................................... 70
Revision History ............................................................. 71
Sales, Solutions, and Legal Information ...................... 72
Worldwide Sales and Design Support ....................... 72
Products .................................................................... 72
PSoC® Solutions ...................................................... 72
Cypress Developer Community ................................. 72
Technical Support ..................................................... 72
Document Number: 002-26168 Rev. *G
Page 3 of 72
PSoC 6 MCU: CY8C62x5 Datasheet
Development Ecosystem
PSoC 6 MCU Resources
Cypress provides a wealth of data at
www.cypress.com
to help you select the right PSoC device and quickly and effectively integrate
it into your design. The following is an abbreviated list of resources for PSoC 6 MCU:
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Overview:
PSoC Portfolio, PSoC Roadmap
Product Selectors:
PSoC 6 MCU
Application Notes
cover a broad range of topics, from basic to
advanced level, and include the following:
❐
AN221774:
Getting Started with PSoC 6 MCU
❐
AN218241:
PSoC 6 MCU Hardware Design Guide
❐
AN213924:
PSoC 6 MCU Device Firmware Update Guide
❐
AN215656:
PSoC 6 MCU Dual-CPU System Design
❐
AN219528:
PSoC 6 MCU Power Reduction Techniques
❐
AN221111:
PSoC 6 MCU Creating a Secure System
❐
AN85951:
PSoC 4, PSoC 6 MCU CapSense Design Guide
Code Examples
demonstrate product features and usage, and
are also available on
Cypress GitHub repositories.
Technical Reference Manuals (TRMs)
provide detailed
descriptions of PSoC 6 MCU architecture and registers.
■
PSoC 6 MCU Programming Specification
provides the infor-
mation necessary to program PSoC 6 MCU nonvolatile
memory
Development Tools
❐
ModusToolbox™
enables cross platform code development
with a robust suite of tools and software libraries
❐
CY8CPROTO-062S3-4343W
PSoC 6 Wi-Fi-BT Prototyping
Kit: a low-cost hardware platform that enables design and
debug of the PSoC 62 CY8C62x5 product line.
❐
PSoC 6 CAD libraries
provide footprint and schematic sup-
port for common tools.
BSDL files
and
IBIS models
are also
available.
Training Videos
are available on a wide range of topics
including the
PSoC 6 MCU 101 series
Cypress Developer Community
enables connection with
fellow PSoC developers around the world, 24 hours a day, 7
days a week, and hosts a dedicated
PSoC 6 MCU Community
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Document Number: 002-26168 Rev. *G
Page 4 of 72
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