Multi output OSC (2port)
MG7050VAN
Product name
MG7050VAN 322.265625MHz 2ADJBN
X1M0004210006xx
Product Number / Ordering code
Please refer to the 10.Packing information about xx (last 2 digits)
Output waveform
LVDS
Pb free / Complies with EU RoHS directive
Reference weight Typ. 163 mg
1.Absolute maximum ratings
Parameter
Symbol
Maximum supply voltage
Storage temperature
Input voltage
Min.
-0.5
-55
-0.5
Typ.
-
-
-
Max.
4
125
Vcc+0.5
Unit
V
ºC
V
Conditions / Remarks
-
Storage as single product
-
Vcc-GND
T_stg
Vin
2.Specifications(characteristics)
Parameter
Symbol
Output frequency
Supply voltage
Operating temperature
Frequency tolerance
Current consumption
Stand-by current
Disable current
Symmetry
Output voltage(LVDS)
Min.
2.375
-20
-50
-
-
-
45
247
-
1.125
-
-
70%Vcc
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-10
-
Typ.
322.2656
2.5
-
-
35
-
7
-
350
-
1.25
-
100
-
-
200
200
5
TBD
TBD
TBD
TBD
TBD
TBD
-
-39.8
-70.8
-101.3
-135.9
-145.7
-148.2
-
-
-
Max.
2.625
70
50
50
-
18.0
55
454
50
1.375
150
-
-
30%Vcc
400
400
10
-
-
-
-
-
-
-
-
-
-
-
-
-
50
10
-
Unit
MHz
V
ºC
x10
-6
mA
mA
mA
%
mV
mV
V
mV
Ω
Conditions / Remarks
2 output
Vcc,Vcc1 and Vcc2
-
-
2-output OE=Vcc L-LVDS=100Ω
-
OE = GND
-
-
-
-
-
-
OE and FSEL terminals
OE and FSEL terminals
Output load condition(LVDS)
Input voltage
Rise time
Fall time
Start-up time
Jitter
Phase jitter
Phase noise
f0
Vcc
T_use
f_tol
Icc
I_std
I_dis
SYM
V
OD
dV
OD
Vos
dVos
L_LVDS
V
IH
V
IL
t
r
tf
t_str
t
DJ
T
RJ
t
RMS
t
p-p
t
acc
t
PJ
L(f)
skew
Frequency aging
t_skew
f_age
ps
ps
ms
ps
ps
ps
ps
ps
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps
x10
-6
/Year
-
-
minimum supply voltage to be 0 s
Deterministic Jitter
Random Jitter
δ(RMS of total distribution)
Peak to Peak
Accumulated Jitter(δ) n=2 to 50000 cycles
Off set Frequency: 12kHz to 20MHz
Off set 1Hz
Off set 10Hz
Off set 100Hz
Off set 1kHz
Off set 10kHz
Off set 100kHz
Off set 1MHz
-
@+25ºC first year
-
1 Page
3.Test circuit
1) Measurement condition
(1) Oscilloscope
• Bandwidth should be 5 times higher than DUT’s output frequency (4 GHz).
• Probe ground should be placed closely from test point and lead length should be as short as possible.
(2) By-pass capacitor 1 (approx. 0.01 μF to 0.1 μF) places closely between Vcc and GND.
(3) By-pass capacitor 2 (approx. 10 μF) places closely between power supply terminals
on the board.
(4) Use the current meter whose internal impedance value is small.
(5) Power supply
• Start up time (0 V→90 %Vcc) of power source should be more than 150 μs and slew rate should be
less than 19.8 mV/μs.
• Impedance of power supply should be as low as possible.
2) 2 output type
2 Page