IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
8 Port 10/100 Ethernet Integrated Switch
Features
Support 1k MAC address
512k bits packet buffer memory
Support auto-polarity for 10 Mbps
Support filter/ forward special DA option
Support broadcast storm protection
Auto MDI-MDIX option
Support port security option to lock the first
MAC address
Support one MII/RMII port, which works at 100
Mbps full duplex for router application
Support port base VLAN & tag VLAN
Support CoS
Support SMART MAC function
Support spanning tree protocol
Support max forwarding packet length 1552/
1536 bytes option
Support 8-level bandwidth control
Support SCA
Support two fiber ports with far end fault
function for
IP178CH
only
Built in linear regulator control circuit
Support Lead Free package (Please refer to
the Order Information)
Note – some features need CPU support, please
refer to the detail description inside this data sheet
General Description
IP178C/IP178CH
integrates a 9-port switch
controller, SSRAM, and 8 10/100 Ethernet
transceivers. Each of the transceivers complies
with the IEEE802.3, IEEE802.3u, and IEEE802.3x
specifications. The transceivers are designed in
DSP approach in 0.18um technology; they have
high noise immunity and robust performance.
IP178C/IP178CH
operates in store and forward
mode. It supports flow control, auto MDI/MDI-X,
CoS, port base VLAN, bandwidth control, DiffServ,
SMART MAC and LED functions, etc. Each port
can be configured as auto-negotiation or forced 10
Mbps/100 Mbps, full/half duplex mode. Using an
EEPROM or pull up/down resistors on specific
pins can configure the desired options.
Besides
an
8-port
switch
application,
IP178C/IP178CH
supports one MII/RMII ports for
router application, which supports 7 LAN ports and
one WAN port. The external MAC can monitor or
configure
IP178C/IP178CH
by accessing MII
registers through SMI.
MII/RMII port also can be configured to be MAC
mode. It is used to interface an external PHY to
work as an 8+1 switch.
IP178CH
supports two fiber ports with far end fault
function.
1/93
Copyright © 2004, IC Plus Corp.
June 21, 2007
IP178Cx-DS-R12
IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
Table Of Contents
Features ...................................................................................................................................................1
General Description..................................................................................................................................1
Table Of Contents.....................................................................................................................................2
Revision History........................................................................................................................................3
Pin diagram (IP178C) .............................................................................................................................10
1 Pin description.................................................................................................................................15
Pin description (continued).....................................................................................................................16
Pin description (continued).....................................................................................................................18
Pin description (continued).....................................................................................................................19
Pin description (continued).....................................................................................................................20
Pin description (continued).....................................................................................................................21
Pin description (continued).....................................................................................................................22
Pin description (continued).....................................................................................................................24
Pin description (continued).....................................................................................................................25
Pin description (continued).....................................................................................................................26
Pin description (continued).....................................................................................................................27
Pin description (continued).....................................................................................................................28
2 Functional Description.....................................................................................................................29
2.1
Flow control.........................................................................................................................32
2.2
Broadcast storm protection.................................................................................................33
2.3
Port locking .........................................................................................................................34
2.4
Port base VLAN ..................................................................................................................35
2.5
Tag VLAN/ Tag and un-tag function ....................................................................................36
2.6
Tag VLAN............................................................................................................................36
2.7
Tag VLAN in router application ...........................................................................................37
2.8
Smart MAC .........................................................................................................................38
2.9
CoS .....................................................................................................................................42
2.9.1
Port base priority....................................................................................................42
2.9.2
Frame base priority ................................................................................................42
2.10 Spanning tree......................................................................................................................44
2.11
Static MAC address table....................................................................................................46
2.12 Serial management interface..............................................................................................47
2.13 SCA.....................................................................................................................................48
2.14 Bandwidth control ...............................................................................................................48
2.15 Register descriptions ..........................................................................................................49
3 Electrical Characteristics.................................................................................................................86
3.1
Absolute Maximum Rating ..................................................................................................86
3.2
DC Characteristic................................................................................................................86
3.3
AC Timing ...........................................................................................................................87
3.3.1
PHY Mode MII Timing ............................................................................................87
3.3.2
MAC Mode MII Timing ...........................................................................................88
3.3.3
RMII Timing............................................................................................................89
3.3.4
SMI Timing .............................................................................................................90
3.3.5
EEPROM Timing....................................................................................................91
3.4
Thermal Data ......................................................................................................................91
4 Order information ............................................................................................................................92
5 Package Detail ................................................................................................................................93
2/93
Copyright © 2004, IC Plus Corp.
June 21, 2007
IP178Cx-DS-R12
IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
Revision History
Revision #
IP178C-DS-R01
IP178C-DS-R02
Change Description
Initial release.
1. Modify Pin diagram in page 9, pin_89 from HASH_MODE[1]/LINK_LED7 to
MLT3_DET/LINK_LED7,pin 84 from LOW_10M_DIS to SCA_DIS, pin_36 from
SCA to NC, VCTRL to REG_OUT
2. Replace VCTRL with REG_OUT
3. Modify HASH_MODE [1] to MLT3_DET in page 17, 54 & 55
4. Modify pin 84 from LOW_10M_DIS to SCA_DIS, pin_36 from SCA to NC
5. Change BF_STM_THR_SEL [1:0] from 01: 128 frames to 126 frames in page 74
6. Modify EXT MII Pin description in page 21, 22, 23
7. "100M" change to "100 Mbps" and "10M" change to "10 Mbps".
8. Modify PHY mode for only support one MIICLK on page 25
9. Add in Thermal Data on page 85
10. Add in power consumption on page 80
11. P.54 PHY30.1[12] Default value=0, P.56 PHY30.2[7] Default value=0, P.56
PHY30.2[0]
為
FORCE_MODE -> BI_COLOR
12. 1.8V change 1.95V
1. Modify FILTER_DA, 01-80-c2-00-00-00 to 01-80-c2-00-00-02 on page 19
2. Modify VLAN_ON function when Pin 53EXTMII_EN=1 on page 18
3. Modify long packet enable function description on page 55
4. Modify Backpressure type selection on page 54
5. Modify RESETB CKT on page 14
6. Modify HASH_MODE [0] to LDPS_DIS on page 17, 54
7. Modify Pin type description on page 13
8. Modify Pin 84 from SCA_DIS to LOW_10M_DIS or SCA_DIS on page 14
9. Modify Pin 73 from LINK_Q to SEL_SCA on page 18
10. Modify Pin diagram on page 9, pin_87 from HASH_MODE [0] to LDPS_DIS,pin
84 from SCA_DIS to LOW_10M_DIS or SCA_DIS, pin_73 from LINK_Q to
SEL_SCA
1. Modify broadcast storm protection function on page 18, page 30, page 75
2. Add BW control value setting on page 81
3. Add BW control description on page 45
4. Rearrange Index
5. Add special_add_forward description on page 81
6. Add “The function is valid only if pin 53 EXTMII_EN is pulled low.” To pin 75, 76,
77, 78, 85, 86, 87
7. Add Note on page 1 for CPU support
1. Add the order information for lead free package
1. Add IP178C.RX_DV connect to MAC.RX_DV and MAC.CRS on page 27
1. All ports unlink on page 84 for VCC
2. Modify VCC min form 1.85V to 1.80V on page 84
3. Modify regulator description on page 1 & 13
1.
2.
3.
1.
2.
3.
1.
Revise the pin description.
Modify Pin diagram of pin 85, 86, 96 and 97.
Modify application diagram on page 10.
Add FXSD7 on page 26 FXSD6 on page 15
Add
fiber application for order information on page 90
Add IP178CH
Pin diagram on page 10
Modify Pin diagram of pin 85, 86, 96 and 97 (IP178CH)
3/93
Copyright © 2004, IC Plus Corp.
June 21, 2007
IP178Cx-DS-R12
IP178C-DS-R03
IP178C-DS-R04
IP178C-DS-R05
IP178C-DS-R06
IP178C-DS-R07
IP178C-DS-R08
IP178C-DS-R09
IP178C-DS-R10
IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
Revision History
Revision #
Change Description
2. Modify Pin description on page 21 for (IP178CH)
3. Modify initial setting on page 5 for (IP178CH)
1. Modify SCA Table on page 48
2. Replace with new SCA register table
3. Replace IP178C with
IP178C/IP178CH
4. Modify the difference of the definition in pin 36 and 57 between IP178B and
IP178C/IP178CH
on page 5 and 6
5. Modify application blocks on page 12, 13 and 14
6. Add “IP178CH support two fiber “ to feature list and general description on page
1
1. Modify from “register 0” to “register 5” on page 74
2. Modify flow control description on page 32
3. Modify IPL/IPH description on page 15
4. Add 2.5V VCC_O DC description on page 86
5. Modify Bi-color LED definition on page 19
6. Replace PHY0 register 1.1 IP113A to IP178C/IP178CH & add RO/LH on page
51
7. Modify OP0 OP1 to FX enable/half on page 60
8. Add FXSDx DC on page 86
9. Modify LED Flash behavior on page 31
10. Add X1 VIL & X1 VIH on page 86
11. Add 512k bits packet buffer memory on page 1
IP178Cx-DS-R11
IP178Cx-DS-R12
4/93
Copyright © 2004, IC Plus Corp.
June 21, 2007
IP178Cx-DS-R12
IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
The difference in pin definition between IP178B and IP178C/IP178CH (MII port disabled:
EXTMII_EN=0)
Pin
36
52
53
56
57
72
73
75
76
77
78
79
80
81
84
85
86
87
90
95
96
97
101
102
103
104
105
EEDI
EEDO
EECS
EESK
LINK_LED3
LINK_LED2
FDX_LED2
FDX_LED1
FDX_LED0
IP178B
Function
NC
REG_OUT
OSCGND
OSCVCC
GND
SPEED_LED1
SPEED_LED0
FDX_LED7
FDX_LED6
FDX_LED5
FDX_LED4
FDX_LED3
VLAN_ON
LED_SEL [1]
LED_SEL [0]
AGING
OP1 [1]
OP1 [0]
HASH_MODE [0]
MID_MDIX_EN
FORCE_MODE
OP0 [0]
OP0 [1]
UPDATE_R4_EN
IPL
IPH
IPH
IPH
IPL
IPL
IPL
IPL
IPL
IPL
IPL
IPH
IPL
IPL
IPL
IPL
LINK_LED3
LINK_LED2
TXCLK
MDIO
MDC
SCL
SDA
LOW_10M_DIS/
SCA_DIS
FDX_LED2
FDX_LED1
FDX_LED0
DIRECT_LED
IPL
Configure
I
I
--
--
Type
IP178C/IP178CH
Function
NC(IP178C)
FXSD6(IP178CH)
REG_OUT
EXTMII_EN=0
RXCLK
GND(IP178C)
FXSD7(IP178CH)
SPEED_LED1
SPEED_LED0
FDX_LED7
FDX_LED6
FDX_LED5
FDX_LED4
FDX_LED3
SEL_SCA
X_EN
AGING
BCSTF
FILTER_DA
VLAN_ON
LED_SEL [1]
LED_SEL [0]
IPL
IPL
IPH
IPH
IPL
IPL
IPL
IPH
IPH
IPH
FX7_EN
IPL
(for IP178CH only)
FX7_HALF
IPL
(for IP178CH only)
LDPS_DIS
IPL
MID_MDIX_EN
BI_COLOR
IPH
IPL
Configure
Type
IPL
O
IPL
IPH
FX6_EN
IPL
(for IP178CH only)
FX6_HALF
IPL
(for IP178CH only)
LONG_PKT_DIS
IPH
IPH
IPL
IPL
IPH
5/93
Copyright © 2004, IC Plus Corp.
June 21, 2007
IP178Cx-DS-R12
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